Realtek Semiconductor Inc.

Kuan-Chia Huang

Ching-Sheng Cheng

Wen-Wei Lin

Tsung-Hsuan Wu

A receiving circuit includes a first channel, a second channel, a third channel and a control circuit, wherein the first channel is arranged to decode and descramble a first data stream to generate first data corresponding to first color information of an image frame, the second channel is arranged to decode and descramble a second data stream to generate second data corresponding to second color information of the image frame, and the third channel is arranged to decode and descramble a third data stream to generate third data corresponding to third color information of the image frame. The control circuit is configured to enable the first channel to make the first channel decode the first data stream, and enable or disable at least part of functions of the second channel and the third channel according to whether or not the image frame is displayed on a display panel.

Receiving circuit and signal processing method for high definition multimedia interface

The present invention provides a control method of multiple memory devices, wherein the multiple devices comprise a first memory device and a second memory device, and the control method includes the steps of: determining a first operation timing and a second operation timing according to at least a first command signal that a first memory controller needs to send to the first memory device; controlling the first memory controller to send the first command signal to the first memory device at the first operation timing; and controlling the second memory controller to send the second command signal to the second memory device at the second operation timing.

Control method of multiple memory devices and associated memory system

A method for simultaneously accessing a first DRAM device and a second DRAM device includes the steps of: in an active phase, generating a first signal at a first pad, wherein the first signal is provided for the first DRAM device to select a first memory bank group, and the first signal is not for the second DRAM device to select any memory bank group; and generating a second signal at the first pad, wherein the second signal is provided for the first DRAM device to select the first bank group, and the second signal and the first signal correspond to a same digital value.

Method for simultaneously accessing first DRAM device and second DRAM device and associated memory controller

A method of memory time division control for a memory system comprising a plurality of memory controllers and memory devices is disclosed. The method comprises assigning a first operation timing to a first memory controller of the plurality of memory controllers and assigning a second operation timing to a second memory controller of the plurality of memory controllers, wherein the first operation timing is interleaved with the time of the second operation timing, transmitting a first chip select signal generated according to the first command signal, to a first memory device of the plurality of memory devices, and transmitting a second chip select signal generated according to the second command signal, to a second memory device of the plurality of memory devices.

Method of memory time division control and related device

A decryption engine includes an update circuit, a key generator, a decryption circuit and a detection circuit. The update circuit generates a first updating information based on a premise of that a currently received frame is encrypted, and generates a second updating information based on a premise of that the currently received frame is non-encrypted. The key generator produces a first key according to the first updating information, and produces a second key according to the second updating information. The decryption circuit generates a first decrypted frame according to the first key and the currently received frame, and generates a second decrypted frame according to the second key and the currently received frame. The detection circuit detects whether the currently received frame is decrypted according to the first decrypted frame and the second decrypted frame, to generate an encryption detection result.

Growing community of inventors

Taipei, Taiwan

Kuan-Chia Huang