Intel Corporation

Ks Venkatraman

Aravindh Baktha

Herbert H Hum

Zhongying Zhang

Harish Kumar

Mike D Upton

A method and apparatus for whacking a &#x3bc;OP based upon the criticality of that &#x3bc;OP. Also disclosed are embodiments of a method for determining the criticality of a &#x3bc;OP.

Placing front instruction in replay loop to front to place side instruction into execution stream upon determination of criticality

A method and device for determining an attribute associated with a locked load instruction and selecting a lock protocol based upon the attribute of the locked load instruction. Also disclosed is a method for concurrently executing the respective lock sequences associated with multiple threads of a processing device.

Method and apparatus for handling locks

A method and system are employed within a processor for performing page table walks on speculative software prefetch operations. The system includes a first fault register to store information associated with a faulting micro-op relating to a non-prefetch memory access operation and a second fault register to store information associated with a faulting micro-op relating to a prefetch memory access operation. Also included in the system is a first unit to determine whether a currently pending micro-op relates to a non-prefetch operation or a prefetch operation. The first unit is configured to drop the currently pending micro-op from a pipeline if (1) the currently pending micro-op relates to a prefetch memory access and (2) the currently pending micro-op has previously faulted.

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Hillsboro, OR, United States of America

Ks Venkatraman