Intel Corporation

Krzysztof Jankowski

Gunnar Gaubatz

Efficient hardware architecture for a S1 S-box for a ZUC cipher is described. One circuit includes a first circuit to map an 8-bit input data of a Galois field GF(256) for a 8-bit data path for a ZUC cipher non-linear function component into 4-bit data paths for the ZUC cipher non-linear function component. The circuit further includes other circuits coupled to the first circuit to execute the 4-bit data paths in GF(16) to determine the inverse of the 8-bit input data for the ZUC cipher non-linear function component in GF(16) and to map the inverse in GF(16) to the Galois field GF(256).

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Folsom, CA, United States of America

Krzysztof Jankowski