Bluerisc, Inc.

Iii Holdings 2, LLC

Other

Kristopher Carver

Saurabh Chheda

Csaba Andras Moritz

Raksit Ashok

Jeffry Gummeson

Santosh Khasanvis

Jeffrey Gummeson

An example process includes identifying, by one or more processing devices, a location in computer code that is subject to vulnerability, where the location corresponds to a memory access that is repeatable and that operates on a particular type of variable; and performing processes, by one or more processing devices, to heal the vulnerability. The memory access may be part of a system-to-system or a user-to-system interaction that is repeatable.

Characterizing, detecting and healing vulnerabilities in computer code

An example process includes: identifying, by one or more processing devices, candidate code in executable code based on a static analysis of the executable code, where the candidate code includes code that is vulnerable to attack or the candidate code being on a path to code that is vulnerable to attack, where information related to the attack is based, at least in part, on the candidate code; customizing, by one or more processing devices, a healing template based on the information to produce a customized healing template; and inserting, by one or more processing devices, the customized healing template into a version of the executable code at a location that is based on a location of the candidate code in the executable code, where the customized healing template includes code that is executable to inhibit the attack.

Detection and healing of vulnerabilities in computer code

A processor system comprising: performing a compilation process on a computer program; encoding an instruction with a selected encoding; encoding the security mutation information in an instruction set architecture of a processor; and executing a compiled computer program in the processor using an added mutation instruction, wherein executing comprises executing a mutation instruction to enable decoding another instruction. A processor system with a random instruction encoding and randomized execution, providing effective defense against offline and runtime security attacks including software and hardware reverse engineering, invasive microprobing, fault injection, and high-order differential and electromagnetic power analysis.

Securing microprocessors against information leakage and physical tampering

An example process that is performed by one or more processing devices uses one or more system states to detect cyber-attacks. The example process includes the following operations: generating a first graph that models states based on information obtained from an electronic device; and performing a correlation of the first graph with one or more second graphs to detect a possibility of a cyber-attack against the electronic device.

Cyber defense with graph theoretical approach

A processing system to reduce energy consumption and improve performance in a processor, controlled by compiler inserted information ahead of a selected branch instruction, to statically expose and control how the prediction should be completed and which mechanism should be used to achieve energy and performance efficiency.

Energy-focused compiler-assisted branch prediction

A method comprising of analyzing and transforming a program executable at compile-time such that a processor design objective is optimized. A method including analyzing an executable to estimate energy consumption of an application component in a processor. A method including transforming an executable to reduce energy consumption in a processor. A processor framework controlled by compiler inserted control that statically exposes parallelism in an instruction sequence. A processor framework to reduce energy consumption in an instruction memory system with compiler inserted control.

Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control

A method, for use in a processor context, wherein instructions in a program executable are encoded with plural instruction set encodings. A method wherein a control instruction encoded with an instruction set encoding contains information about decoding of an instruction that is encoded with another instruction set encoding scheme. A method wherein instruction set encodings are randomly generated at compile time. A processor framework wherein an instruction is decoded during execution with the help of information provided by a previously decoded control instruction.

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Chicopee, MA, United States of America

Kristopher Carver