Texas Instruments Corporation

Krishnamurthy Ganapathi Shankar

Ashish Ojha

Priyank Anand

Siddhartha Gopal Krishna

Venkata Naresh Kotikelapudi

Ganapathi Hegde

Venkatesh Guduri

Divyasree J

Subramanian Jagdish Narayan

Anand Gopalan

Chinmay Jain

Kalpana Suryawanshi

Sarangan Thirumavalavan

Sandeep Kalyadan

Sachin S

Examples of contactor controllers, systems and methods enable quick-turn-off (QTO) using an output voltage of a contactor controller when its supply voltage is below a threshold but does not interfere with QTO when sufficient supply voltage is available. In an example, when VM loss occurs, a high-side (HS) clamp of a contactor controller is disabled, and a low-side (LS) clamp current is generated using the output voltage. The LS clamp current may be adjusted to achieve a desired QTO voltage. In another example, a HS clamp is disabled and the charging of the gate of a LS field-effect transistor (FET) is enabled only when the output voltage increases above a power-off QTO threshold (less than the LS clamp voltage); the QTO voltage is set by a voltage detection and comparison circuit of the contactor controller.

Quick turn off of contactor system during power off

A control circuit regulates the propagation delay of a field effect transistor (FET) before the FET transitions to the Miller region by applying a pre-charge current for a fixed duration to the gates of the FET. After the fixed duration, the current is reduced to a lower drive current level which is based on a desired output voltage slew rate. After the FET transitions to the Miller region, the output voltage slews down in accordance with the output voltage slew rate. By regulating the slew-rate of the output voltage in the Miller region and regulating the propagation delay of the FET prior to the Miller region, the control circuit reduces electromagnetic interference (EMI) caused by the switching of the FET, thereby improving electromagnetic compatibility (EMC) of switch mode driver systems without increasing the propagation delay of the FET.

Systems and methods for regulation of propagation delay in DC motor drivers

A gate driver includes a gate current circuit and a driver logic circuit. The gate current circuit has a gate current circuit output and includes first and second current sources coupled to the gate current circuit output. The driver logic circuit has a capacitor and is configured to: charge and discharge the capacitor to generate a detect voltage across the capacitor; cause the first current from the first current source to flow to the gate current circuit output in response to a voltage on the gate current circuit output being below the detect voltage; and cause the second current from the second current source to flow to the gate current circuit output in response to the voltage on the gate current circuit output being above the detect voltage.

Gate driver with feed forward control of gate current

An apparatus for regulating a slew time of an output voltage of a motor driver system includes a gate current control circuit which has a first input coupled to receive a target slew time and a second input coupled to receive a slew time. The gate current control circuit provides an incremented gate current if the slew time is greater than the target slew time and provides a decremented gate current if the slew time is less than the target slew time. The apparatus includes a gate driver which has a first input coupled to receive a PWM signal and a second input coupled to receive the gate current. The gate driver provides a gate drive signal.

Systems and methods for regulating slew time of output voltage of DC motor drivers

Disclosed is a ripple counter with a dynamic bandpass filter for a DC motor. The ripple counter includes a current sense amplifier configured to provide an analog voltage responsive to an inline current in rotor windings of the DC motor. The ripple counter also includes an analog-to-digital converter configured to provide a digital signal responsive to the analog voltage. The ripple counter also includes a digital filter configured to receive the digital signal and a clock signal and configured to vary a frequency response to provide a filtered ripple current. The ripple counter also includes a digital comparator circuit configured to receive the filtered ripple current and to provide a pulsed output. The ripple counter also includes a clock generator configured to detect the frequency of the pulsed output and to provide the clock signal responsive to the detected frequency.

Ripple counter with dynamic bandpass filter for DC motor

Examples of contactor controllers, systems and methods time-modulate levels of high-side (HS) and low-side (LS) clamp voltages in a contactor controller to switch a path through which current flows during quick-turn-off (QTO) of the contactor controller. One of the clamp voltages is at a high level and the other is at a low level. The output voltage of the contactor controller is held at the low level. The path switching may be a function of one or more parameters. In a configuration, the level of a supply voltage of the contactor controller is monitored and used to control the path switching. In a configuration, temperatures of HS and LS transistors of the contactor controller are monitored and used to control the path switching. Control of the path switching may be performed to dissipate power in a larger area to increase thermal performance of the contactor controller. Both clamps may remain active throughout the QTO process, providing redundancy and safety.

Time multiplexing voltage clamping in coil driving circuit for a contactor during quick turn off

A stepper motor driver includes an H-bridge including first and second outputs. The H-bridge includes a low-side transistor coupled between the first output and a ground. A reference current circuit is configured to produce a reference current. The reference current circuit has a reference output. An averager circuit includes an input and output. The input of the averager circuit is coupled to the first output of the H-bridge. A comparator includes first and second comparator inputs. The first input of the comparator is coupled to the output of the average circuit and the second input of the comparator is coupled to the reference output.

Average current control in stepper motor

A device includes FETs with control terminals. A gate driver circuit causes the FETs to turn on and to enter a high-impedance state in response to an OCP signal. A current sense circuit senses an FET current through the FETs and sends the OCP signal to the gate driver circuit when the FET current exceeds an OCP current for longer than an OCP deglitch period. A test sequencer, in response to receiving an external test mode signal, sets the OCP current to a preset OCP test current, sets the OCP deglitch period to a preset OCP deglitch test period, and causes the gate driver circuit to turn on the plurality of FETs.

Internal device sequencer for testing mode

A driver circuit includes three sub-circuits. A first sub-circuit is configured to generate a drive current output by the driver circuit through an output node during first and second regions of operation and includes: a diode coupled to the output node and a first transistor, and a second transistor coupled to the first transistor and a current mirror. A second sub-circuit is configured to generate the drive current during the first and second and a third region of operation and includes: a third transistor coupled to the output node; and a fourth transistor. A third sub-circuit is configured to generate the drive current during the third region of operation and includes: a current source coupled to the current mirror and a buffer; and a fifth transistor coupled to the third transistor and the fourth transistor and configured to receive an output of the buffer.

Gate driver circuit for reducing deadtime inefficiencies

A circuit includes a first transistor, a second transistor, and a sense transistor. The first current terminals of the first and second transistors are coupled together at a power supply node. The control terminals of the second and third transistors are coupled together. The second current terminals of the first, second, and third transistors are coupled together. The sense resistor is coupled between the first current terminals of the first and second transistors and the first current terminal of the third transistor. The first and second transistors are configured such that during a first mode of operation, current to a load flows through the first and second transistors, and during a second mode of operation, current to a load is discontinued through the first transistor yet flows through the second transistor.

Over-current protection circuit

A circuit includes an input terminal, a first transistor, a second transistor, a comparator, a voltage reference circuit, and a control circuit. The first transistor includes a first terminal coupled to the input terminal. The second transistor includes a first terminal coupled to the input terminal. The comparator includes a first terminal coupled to the input terminal. The voltage reference circuit is coupled to a second terminal of the comparator. The control circuit includes an input, a first output, and a second output. The input is coupled to an output of the comparator. The first output is coupled to a second terminal of the first transistor. The second output is coupled to a second terminal of the second transistor.

Open load detection circuits

A driver circuit comprises a first buffer receiving a control signal, and a first transistor coupled to first buffer and an output. A second transistor is coupled to a first current mirror and the output. A third transistor is coupled to the output and an inverter. A fourth transistor receives the inverter's output at its control input and is coupled to the output. A fifth transistor is coupled to third transistor. The second, third, and fifth transistors receive supply voltage at their respective control inputs. A sixth transistor receives the control signal's inverse at its control input and is coupled to fifth transistor and a second current mirror. A current source is coupled to second current mirror and a second buffer. A seventh transistor receives the second buffer's output at its control input and is coupled to first buffer. An eighth transistor is coupled to first buffer and seventh transistor.

A stepper driver for a motor includes an H-bridge, a sense transistor coupled to the H-bridge, a voltage-to-current (Vtol) converter, and a sine digital-to-analog converter (DAC). The Vtol converter has a Vtol converter input and a Vtol converter output. The Vtol converter output is coupled to the sense transistor. The sine DAC has a sine DAC digital input, a reference input, and a sine DAC output. The sine DAC output is coupled to the Vtol converter input. The sine DAC includes an R-2R network, an offset control circuit coupled to the R-2R network, and a gain control circuit also coupled to the R-2R network.

Motor stepper driver having a sine digital-to-analog converter

A driver circuit comprises a first transistor coupled to a second transistor, and a third transistor coupled to the first and second transistor and to a first current mirror. An output of the first current mirror is provided to a control input of the second transistor. A second current mirror is coupled to the output of the first current mirror. A first current source, a second current source, and a fourth transistor are coupled to the second current mirror. The second current source is further coupled to a fifth transistor. A sixth transistor is coupled to the fifth transistor and to a third current mirror. In some implementations, the driver circuit is coupled to a low side transistor in an H bridge driver and the second transistor is matched to the low side transistor.

Gate driver circuit with a closed loop overdrive generator

A system includes a trickle charge control circuit coupled to a charge pump and a motor driver circuit. The trickle charge control circuit is configured to sense a voltage at a bootstrap capacitor voltage node (VBST) of the motor driver circuit; as a result of the voltage at VBST being greater than a voltage at an input voltage node (VIN), couple a charge pump voltage node (VCP) to VBST of the motor driver circuit, where a voltage at VCP is greater than the voltage at VIN; and as a result of the voltage at VBST being less than the voltage at VIN, decouple VCP from the charge pump from VBST of the motor driver circuit.

Growing community of inventors

Bengaluru, India

Krishnamurthy Ganapathi Shankar