Intel Corporation

Applied Materials, Inc.

Crystal Solar, Inc.

Crystallume Corporation

Other

Kramadhati V Ravi

Gregory Martin Chrysler

Michael C Garner

Sairam Agraharam

James G Maveety

Abhay A Watwe

Brian S Doyle

Manish Chandhok

Tirunelveli Subramaniam Ravi

Qing Ma

Valluri Ramana Rao

Eric Cabot Hannah

Robert L Bristol

Fay Hua

Rajashree Raji Baskaran

John M Pinneo

Michael G Peters

Somnath S Nag

Sing-Chung Hu

Bryan J Rice

Ashish Asthana

Maciek Orczyk

Jim Maveety

Melissa K Shell

Linda S Plano

Li Ling

Visweswaren Sivaramakrishnan

Alan M Myers

Ravi S Prasher

Mohamad A Shaheen

Tirunelveli S Ravi

Tan Shida

Tom X Tong

Yuli Chakk

Methods of forming a microelectronic structure are described. Those methods comprise forming a bond between a non-device side of a first die and a non-device side of a second die, wherein forming the bond between the non-device side of the first die and the non-device side of the second die does not comprise using an interfacial glue.

Fabrication of stacked die and structures formed thereby

Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell. The solar cells may comprise epitaxially deposited silicon and may include an epitaxially deposited back surface field.

Method of fabricating a metal wrap through solar cell

A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.

Apparatus to minimize thermal impedance using copper on die backside

Methods are described for fabricating HIT solar cells, including double heterojunction and hybrid heterojunction-homojunction solar cells, with very thin single crystal silicon wafers, where the silicon wafer may be less than 80 microns thick, and even less than 50 microns thick. The methods overcome potential issues with handling these very thin wafers by using a process including epitaxial silicon deposition on a growth substrate, partial cell fabrication, attachment to a support substrate and then separation from the growth substrate. Some embodiments of the present invention may include a solar cell device architecture comprising the combination of a heterostructure on the front side of the device with a homojunction at the rear of the device. Furthermore, device performance may be enhanced by including a dielectric stack on the backside of the device for reflecting long wavelength infrared radiation.

Silicon heterojunction solar cells

MWT architecture for thin SI solar cells

Passivated emitter rear local epitaxy (PERL-e) thin Si solar cells may be formed with a heavily doped epitaxial back surface field (BSF) layer, which is patterned to form well spaced point contacts to the silicon base on the rear of the solar cell. The back side of the cell may be finished with a dielectric passivation layer and a metallization layer for making electrical contact to the cell. PERL-e thick Si solar cells may be formed with heavily doped epitaxial films as the back point contacts, where the point contacts are defined by the provision of a selectively patterned thermal oxide on the rear wafer surface. Furthermore, absorption of longer wavelength, infrared (IR), light in thin silicon solar cells may be improved by the addition of a dielectric stack on the rear surface of the solar cell (a back reflector).

Passivated emitter rear locally patterned epitaxial solar cell

A stressed semiconductor using carbon is provided. At least one carbon layer containing diamond is formed either below a semiconductor layer or above a semiconductor device. The carbon layer induces stress in the semiconductor layer, thereby increasing carrier mobility in the device channel region. The carbon layer may be selectively formed or patterned to localize the induced stress.

Stressed semiconductor using carbon and method for producing the same

The porosity of a diamond film may be increased and its dielectric constant lowered by exposing a film containing sphybridization to ion implantation. The implantation produces a greater concentration of sphybridizations. The sphybridizations may then be selectively etched, for example, using atomic hydrogen plasma to increase the porosity of the film. A series of layers may be deposited and successively treated in the same fashion to build up a composite, porous diamond film.

Method of forming porous diamond films for semiconductor applications

Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed.

Semiconductor substrate with islands of diamond and resulting devices

The present invention discloses a method including: providing a substrate; and sequentially stacking layers of two or more diamond-like carbon (DLC) films over the substrate to form a composite dielectric film, the composite dielectric film having a k value of about 1.5 or lower, the composite dielectric film having a Young's modulus of elasticity of about 25 GigaPascals or higher.

Formation of dielectric film by alternating between deposition and modification

A method of forming a high thermal conductivity diamond film and its associated structures comprising selectively nucleating a region of a substrate, and forming a diamond film on the substrate such that the diamond film has large grains, which are at least about 20 microns in size. Thus, the larger grained diamond film has greatly improved thermal management capabilities and improves the efficiency and speed of a microelectronic device.

Methods of forming a high conductivity diamond film and structures formed thereby

An electronic device includes a die further having a first major surface, and a second major surface. The electronic device also includes a plurality of connectors associated with the first major surface of the die, and an integrated heat spreader in thermally conductive relation with the second major surface of the die. The integrated heat spreader also has a layer of silicon, and a layer of diamond attached to the layer of silicon. The first major surface of the die attached to a printed circuit board. A method for forming a heat dissipating device includes placing a layer of diamond on a silicon substrate, and thinning the silicon substrate. The substrate is diced to form a plurality of heat dissipating devices sized to form a thermally conductive connection to a die. A surface of the silicon substrate is placed in thermal communication with a source of heat.

Diamond-silicon hybrid integrated heat spreader

Growing community of inventors

Atherton, CA, United States of America

Kramadhati V Ravi