Xerox Corporation

Kraig A Quinn

Brian T Ormond

Josef E Jedlicka

Paul Allen Hosier

Donald J Drake

Mark Anthony Cellura

Robert Paul Herloski

Douglas E Proctor

Charles J Urso, Iii

John C Juhasz

Frederick O Hayes, Iii

Jeffrey D Barner

Image sensor module architecture provides flexible mounting of illuminators in an imaging apparatus with flexible fasteners. The architecture involves one or more LED-based illuminators that may be mounted adjustably to provide high intensity and uniform profile luminescence. The supporting imaging and electronic circuit components are quickly assembled and disassembled from the image sensor module by using a flexible multi-function clip having multiple segments for holding multiple objects together.

Image sensor module architecture

The present disclosure relates that constraining a substrate into a convex arc prior to mounting and affixing of any chips, allows those chips to achieve exemplary final chip-to-chip abutment when the substrate is released and allowed to return to stasis. This is particularly of use where there are any intervening thermal cycles, and the thermal temperature coefficients of expansion for the chip/die and any substrate/mount are significantly different. This will allow the utilization of otherwise more desirable materials for the substrate in spite of some mismatch in thermal coefficients that may exist between the substrate and chips.

Mounting and curing chips on a substrate so as to minimize gap

An imaging apparatus is formed of two or more imaging subarrays. Each imaging subarray is formed of a printed wiring board containing semiconductor imaging chips. The end chip of each board projects beyond the edge of the board. The imaging subarrays are joined together so that the projecting end chips may be closely spaced from one and another, without the circuit boards contacting one another. Glass tie bars formed of a low thermal expansion glass secure the boards to one another. A light curable adhesive secures each tie bar to the printed wiring board.

Assembly of imaging arrays for large format documents

Semiconductor chips, such as photosensor arrays in a full-width scanner, are mounted on printed wiring boards. The printed wiring boards are in turn mounted on a second layer of printed wiring board material. The two layers of printed wiring board material are attached so that the seams between adjacent printed wiring boards in each layer alternate in a brick-like fashion. This structure enables arrays of semiconductor chips to be constructed in relatively long lengths, with minimal risk of damage caused by thermal stresses.

Construction of scanning or imaging arrays suitable for large documents

Semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, are mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. To remove a defective chip from the array, the substrate is urged evenly against a work surface defining a convex bow. Alternately, back-cuts are provided along abutting edges of the chips, and the silicon around these back-cuts can be sawed away to space defective chips from neighboring good chips.

Replacing semiconductor chips in a full-width chip array

A printed wiring board includes features which allow the board to be held firmly in place by a vacuum mounting device so that semiconductor chips can be placed thereon, and wire bonds established between the semiconductor chips and the circuitry on the board. The side of the board opposite the side having the semiconductor chips defines a ridge which encloses a portion of the surface area thereof. The ridge forms a gasket around a vacuum slot on the vacuum mounting device. The ridge also provides a firm surface for wirebonds to be ultrasonically welded to landings on the board.

Wiring board for supporting an array of imaging chips

Semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, are mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. To remove a defective chip from the array, the substrate is urged evenly against a work surface defining a convex bow. Alternately, back-cuts are provided along abutting edges of the chips, and the silicon around these back-cuts can be sawed away to space defective chips from neighboring good chips. By increasing the spacing of a defective chip from neighboring chips, the defective chip can be removed while minimizing the risk of damage to neighboring chips. Also, batches of chips can be originally manfactured on a single wafer as either 'regular' chips or 'replacement' chips, with the replacement chips being slightly shorter in a critical dimension.

In an array of butted silicon chips, as would be found in a full-page photosensitive scanner, ink-jet printhead, or LED exposure bar, individual silicon chips forming the array each define a planar bevel near the border of a neighboring chip. The planarity of the bevel avoids damage to the chips when the chips are placed in the chip array assembly.

Butted chip array with beveled chips

Semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, are mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. To remove a defective chip from the array, the substrate is urged evenly against a work surface defining a convex bow. Alternately, back-cuts are provided along abutting edges of the chips, and the silicon around these back-cuts can be sawed away to space defective chips from neighboring good chips. By increasing the spacing of a defective chip from neighboring chips, the defective chip can be removed while minimizing the risk of damage to neighboring chips. Also, batches of chips can be originally manufactured on a single wafer as either 'regular' chips or 'replacement' chips, with the replacement chips being slightly shorter in a critical dimension.

Semiconductor wafer divisible into chips for creating or recording images

An assembly facilitates mounting a set of abutted semiconductor chips, such as chips aligned to form a single full-page-width linear array of photosensors in a digital scanner or copier. An elongated bead of electrically conductive adhesive extends along a surface of a support substrate. A plurality of semiconductor chips is disposed along the elongated bead, each semiconductor chip including a linear array of photosensors on a front surface thereof, and a back surface attached to the support substrate by the electrically conductive adhesive. A connection block is disposed along another portion of the elongated bead, the block including a first surface contacting the bead, a second surface, and a conductor extending from the first surface to the second surface.

Assembly for mounting semiconductor chips in a full-width-array image

A full width read and/or write assemblies, such as a full width thermal ink jet printbar, is disclosed, having materials with both a high thermal coefficient of expansion and a low thermal coefficient of expansion. A suitable adhesive which provides lateral give while firmly holding the respective components together provides dimensional stability to the printbar element having a low thermal coefficient of expansion when components having high thermal coefficient of expansion are assembled thereto. The flexible or floating mounting enabled by lateral give of the adhesive allows for the application of cost effective materials with a high thermal coefficient of expansion to be used for support functions such as, for example, circuit boards and ink manifolds. The flexible or floating mounting relieves shear stress cased by a differential in the expansion or contraction of materials having a different thermal coefficient of expansion. Since the thermal expansion of the various components expand and contract from a center location thereof, this center location is bonded by an adhesive which does not provide lateral give, so that alignment between parts are maintained while the remainder of the respective components float relative to each other and prevent thermally induced stresses which tend to cause warpage.

Full width array read or write bars having low induced thermal stress

A process for manufacturing semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. Before chips are tacked onto the substrate with uncured epoxy, the substrate is urged evenly against a work surface defining a concave bow. The radius of curvature of the concave bow is calculated as a function of the desired spacing between adjacent chips. When the substrate having chips tacked thereon is released form the work surface, neighboring chips have parallel adjacent surfaces of the desired spacing.

Process of mounting semiconductor chips in a full-width-array image

Semiconductor chips, such as photosensor arrays in a full-width scanner, are mounted on a substrate to maintain reasonably consistent spacing among chips regardless of temperature conditions during use. After chips are tacked onto the substrate with uncured epoxy, the assembly is brought to a low temperature prior to the heating of the curing step. The technique permits design of the assembly to compensate for differences between the thermal coefficient of expansion of the chips and that of the substrate, while also minimizing mechanical stresses on the chips caused by heating in the course of use.

Photosensitive array wherein chips are not thermally matched to the

Method for minimizing stress between semiconductor chips having a

An improved process for forming individual dies having faces that allow the dies to be assembled against other like dies to form one and/or two dimensional scanning arrays with minimal chipping and fracturing wherein the active side of a wafer is etched to form separation grooves with the wall of the grooves adjoining the die presenting a relatively wide surface to facilitate sawing, wide grooves are cut in the inactive side of the wafer opposite each separation grooves, and the wafer cut by sawing along the separation grooves, the saw being located so that the side of the saw blade facing the die is aligned with the midpoint of the wide wall so that on sawing the bottom half of the wall and the remainder of the grooves are obliterated leaving the top half of the wall to prevent cracking and chipping during sawing.

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Webster, NY, United States of America

Kraig A Quinn