Mitsubishi Denki Kabushiki Kaisha

Kozo Yamagami

Toshihiro Nakajima

Yoshiaki Hisamoto

A gate turn-off thyristor module having reduced circuit inductances. One or more gate turn-off thyristor chips are housed in a resin package. The main electrode and control terminals are disposed on an upper face of the package, while terminals for making connections to a snubber circuit are positioned at a different height from the main electrode control terminals. Preferably, the snubber circuit connecting terminals are located as close as possible to the respective electrode of their corresponding thyristor chip.

Gate turn-off thyristor module

A gate turn-off thyristor including N-type emitter regions (4) formed in part in the surface layer of a P-type base layer (3), and P.sup.+ layer regions (10) of a high impurity concentration formed immediately beneath gate electrodes (8) in the P-type base layer (3) and immediately beneath the periphery of the N-type emitter regions (4), such that the depth of the P.sup.+ layer regions immediately beneath the gate electrodes (8) is selected to be deeper than the N-type emitter regions (4).

Gate turn-off thyristor having P.sup.+  gate and emitter

An improved semiconductor pressure sensor of the silicon diaphragm type is disclosed. The sensor includes a pressure sensor device composed of a substrate of monocrystalline silicon, a diffused resistive layer formed on one surface of the substrate and a cavity formed in the other surface to create a thin-walled area that includes the diffused resistive layer with the cavity surrounded by a thick-walled leg portion. A hermetic sealable cap covers the one surface of the sensor device. A conductive diffused region from which an electrical signal can be picked up is provided in the leg portion electrically connected to the diffused resistive layer.

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Hyogo, Japan

Kozo Yamagami