Hitachi, Ltd.

Hitachi Tohbu Semiconductor, Ltd.

Kouzou Sakamoto

Takeaki Okabe

Isao Yoshida

Shigeo Mikoshiba

Akihiko Kougami

Masahiro Eto

Isamu Orita

Toyomasa Koda

Masatoshi Morikawa

Terumi Sawase

Akio Hoshi

Masatoshi Kimura

Yukihiro Sato

Shigeo Ohtaka

Kazuo Hoya

Kouichiro Satonaka

In a method for driving a display device, by which energy stored in a plurality of electrodes serving as a capacitive load is recovered through switches, current paths for charging said electrodes from a charge supplying source differ from current paths for discharging the electrodes for the energy recovery.

Driving method and apparatus for display device

A switching circuit has switching elements for passing-through or cutting-off signals of a positive pulse, which is a rectangular pulse rising from a low level and falling after having kept a high level for a certain time as a high voltage input signal, and a negative pulse, which is a rectangular pulse falling from a high level and rising after having kept a low level for a certain time, the switching circuit being applied to a capacitive load driving device.

Switching circuit and display device using the same

A semiconductor integrated circuit has a semiconductor output device (3) , a sensor (5) generating an electric signal (7) relevant to heat generation (6) of the output device (3) and a microprocessor unit MPU 2, inside a chip (1). The MPU (2) is constructed of a memory (20) and CPU (22). The electric signal (7) generated from the sensor (5) is processed by the CPU (22) in accordance with a stored program of the memory (20). Accordingly, the drivability of the semiconductor output device (3) can be set in an optimum state corresponding to changes in chip temperature including changes that are only momentary.

Semiconductor integrated circuit having semiconductor output device

A packaged semiconductor device has, according to one embodiment of the present invention, a semiconductor pellet having an electronic circuit therein and electrode pads formed on a principal surface of the pellet, a plurality of electrical connection bumps provided on the electrode pads, a plurality of heat dissipation bumps provided at the principal surface of the pellet and electrically insulated from the electronic circuit and the electrode pads, electrical connection leads for the electronic circuit, heat dissipators for the electronic circuit and a packaging material for sealing pellet, the electrical connection bumps, the heat dissipation bumps and parts of the electrical connection leads and the heat dissipator. One or more of the heat dissipation bumps are arranged relatively nearer to the electronic circuit than the electrical connection bumps for thermal coupling to the electronic circuit. One or more of the electrical connection leads may be engaged with the electrical connection bumps and the heat dissipation bumps and/or one or more of the dissipators may be engaged with the heat dissipation bumps and the electrical connection bumps, thereby serving to effect electrical connection to and heat dissipation for the electronic circuit.

Packaged semiconductor device having heat dissipation/electrical

A method of fabricating semiconductor devices which include vertical elements and control elements. A well is formed by etching in a semiconductor substrate of a first conductivity type, and a first epitaxial layer having a second conductivity type opposite to the first conductivity type is epitaxially grown, followed by etching and/or grinding and/or polishing to fill said well. Further, a second epitaxial layer of the first conductivity type is epitaxially grown on the substrate and on the first epitaxial layer, and an impurity-doped layer of the second conductivity type for isolation is formed in the second epitaxial layer to penetrate therethrough. A first element is formed in the second epitaxial layer in a portion that corresponds to the well, and a second element having a vertical structure and having a current capability higher than that of the first element is formed except a portion of the second epitaxial layer that corresponds to the well.

Method of fabricating semiconductor devices which include vertical

Growing community of inventors

Tokyo, Japan

Kouzou Sakamoto