Samsung Electronics Co., Ltd.

Koungmin Ryu

Jongmin Baek

Donghyun Roh

Sangkoo Kang

Junghwan Chun

Bongkwan Baek

Sanghyun Lee

Sungsoo Kim

Sangjin Hyun

Kyu-Hee Han

Wookyung You

Sunki Min

Hongsik Shin

Dae-Young Kwak

Sunhye Lee

Je-min Yoo

Guyoung Cho

Shinhye Kim

Sangshin Jang

Songe Kim

Seunggwang Kim

A semiconductor device may include PMOSFET and NMOSFET regions spaced apart from each other on a substrate, first and second active patterns provided on the PMOSFET and NMOSFET regions, respectively, a first channel pattern on the first active pattern, a source/drain pattern electrically connected to the first channel pattern, an active contact electrically connected to the source/drain pattern, the active contact including a first conductive pattern and a first barrier pattern enclosing a portion of a side surface and a bottom surface of the first conductive pattern, a gate electrode extending in a direction crossing the first channel pattern, a gate contact electrically connected to the gate electrode, an air gap provided on the first barrier pattern and between the gate contact and the first conductive pattern, and a lower via provided on the active contact. The lower via may be adjacent to the air gap.

Semiconductor device

A semiconductor device including a first conductive layer on a substrate, a second conductive layer on the first conductive layer, a contact structure between the first and second conductive layers, and a barrier structure surrounding a lower region of a side surface of the second conductive layer, wherein the contact structure includes a contact conductive layer having a first upper surface portion and a second upper surface extending from the first upper surface portion and being concave, and a gap-fill pattern fills a space between the second upper surface portion and the second conductive layer and includes a first gap-fill insulating layer including a metal element and a second gap-fill insulating layer including a silicon element, and the barrier structure includes a first etch stop layer and a barrier layer that include same materials as the first insulating material and the second insulating material, respectively, may be provided.

Semiconductor devices

A semiconductor device includes an active region extending on a substrate in a first direction, a gate structure including a gate electrode extending on the substrate in a second direction and traversing the active region, a spacer structure extending on opposing sidewalls of the gate electrode in the second direction, and a capping layer on the gate electrode and the spacer structure, a source/drain region on the active region adjacent the gate structure, and a first contact plug connected to the source/drain region and a second contact plug connected to the gate structure. The capping layer includes a lower capping layer and an upper capping layer on the lower capping layer, and the second contact plug penetrates through the capping layer, is connected to the gate electrode and includes a convex sidewall penetrating into the upper capping layer.

A semiconductor device includes a gate structure disposed on a substrate; a source and drain layer disposed on the substrate adjacent the gate structure; a first contact plug disposed on the source and drain layer, an insulation pattern structure disposed on the first contact plug, the insulation pattern structure including insulation patterns having different carbon concentrations; and a second contact plug disposed on the gate structure.

Semiconductor devices including insulation patterns with different carbon concentrations

A semiconductor device includes active fins extending in a first direction on a substrate; an isolation insulating layer covering a portion of side surfaces of the active fins; channel layers stacked vertically and spaced apart on the active fins; a gate pattern in a second direction across the active fins and the channel layers; and spacer layers across the active fins in the second direction on both sides of the gate pattern. At least one spacer layer extends downwardly along a side surface of the gate pattern such that a lower surface thereof contacts the isolation insulating layer. The lower surface of the spacer layer is higher than a level of upper surfaces of the active fins. The gate pattern has a lower surface contacting the isolation insulating layer. The lower surface of the gate pattern is lower than a level of the upper surfaces of the active fins.

Multi-bridge channel field effect transistor with multiple inner spacers

A semiconductor device includes a gate structure including a gate electrode, a gate spacer layer on a side surface of the gate electrode, and a gate capping layer on the gate electrode. Moreover, the semiconductor device includes a source/drain region on at least one side of the gate structure, a contact plug on the source/drain region, and first and second insulating films between the contact plug and the gate structure and defining an air gap. The first insulating film includes a first surface, and a second surface extending from the first surface while forming a first angle. The second insulating film includes a third surface forming a second angle with the first surface of the first insulating film. The second angle is an acute angle narrower than the first angle. The air gap is defined by the first surface, the second surface, and the third surface.

A semiconductor device includes active patterns protruding from a substrate and an insulation structure surrounding lower portions of the active patterns. The insulation structure includes an insulation layer conforming to a top surface of the substrate and to sidewalls of the active patterns and a buried insulation pattern on the insulation layer.

A semiconductor device includes a substrate having a first active pattern and a second active pattern, the first active pattern including a first recess region dividing an upper portion thereof into a first portion and a second portion, the second active pattern including a second recess region dividing an upper portion thereof into a first portion and a second portion, a first insulating pattern covering an inner sidewall of the first recess region, and a second insulating pattern covering an inner sidewall of the second recess region. The first insulating pattern and the second insulating pattern include the same insulating material, and a volume fraction of the first insulating pattern with respect to a volume of the first recess region is smaller than a volume fraction of the second insulating pattern with respect to a volume of the second recess region.

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Hwaseong-si, South Korea

Koungmin Ryu