Kabushiki Kaisha Toshiba

Kouichirou Inoue

Shinji Fujii

Haruo Okano

Hiroaki Hazama

Yoshiaki Matsushita

Kikuo Yamabe

Muneaki Maeno

Takako Okada

Shinji Onga

Naoto Higuchi

Nobuhiko Kurata

Taisei Suzuki

A third interconnection layer is disposed near a first interconnection layer and a second interconnection layer disposed above the first interconnection layer. The first interconnection layer and second interconnection layer are connected to each other by a regular via plug and a via plug for redundancy. The via plug for redundancy is disposed by the side of the regular via plug and between the regular via plug and the third interconnection layer. An extended portion of the second interconnection layer is extended from a portion connected to the via plug for redundancy on the second interconnection layer toward the third interconnection layer. The extended portion has a dimension smaller than the minimum dimension prescribed in the interconnection line design rule.

Semiconductor integrated circuit device comprising different level interconnection layers connected by conductor layers including conductor layer for redundancy

Semiconductor devices whose current characteristics can be prevented from varying even if a phase shift mask is used for patterning gate electrodes of MISFETs, and a manufacturing method thereof are disclosed. According to one aspect of the present invention, there is provided a semiconductor device comprising a first transistor including a first gate electrode provided above a semiconductor substrate, and a first source and a first drain provided in the semiconductor substrate, a second transistor arranged to be adjacent to the first transistor, and including a second gate electrode provided above the semiconductor substrate in parallel with the first gate electrode, and a second source and a second drain provided in the semiconductor substrate, and a third gate electrode provided between the first transistor and the second transistor and in parallel with the first and second gate electrodes.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a monocrystalline silicon substrate, an insulating film consisting of a monocrystalline silicon oxide formed on the surface of the monocrystalline silicon substrate, and a conductive film formed on the insulating film. The monocrystalline silicon substrate has a (100) plane orientation, the insulating film essentially consists of .beta.-cristobalite having a unit structure in a P4.sub.1 2.sub.1 2 structural expression in such a manner that every other silicon atoms of four silicon atoms aligned about a C-axis are arranged on two adjacent silicon atoms aligned in a 110! direction on an Si (100) plane, and that a plane including the C-axis of the .beta.-cristobalite and the 110! direction is set perpendicular to the (100) plane.

Semiconductor device with monocrystalline gate insulating film

Growing community of inventors

Yokosuka, Japan

Kouichirou Inoue