Other

Renesas Technology Corp.

Hitachi, Ltd.

Hitachi Tohbu Semiconductor, Ltd.

Kouichi Yahagi

Masumi Kasahara

Hiroki Nakajima

Tatsuji Matsuura

Junya Kudoh

A semiconductor integrated circuit having a built-in A/D conversion circuit which enables, where the A/D conversion circuit is to be built into a semiconductor chip, the required capacitance of the stabilization capacitor to be connected to the output terminals of reference voltage generators for generating reference voltages to be reduced is to be provided to contribute to preventing the number of external terminals and the chip size from increasing. A semiconductor integrated circuit having a built-in differential type A/D conversion circuit comprising a differential amplifier, a local A/D converter and local D/A converters, further provided with a first reference voltage generator for generating a first reference voltage and a second reference voltage generator for generating a second reference voltage both for use by the local A/D converter, wherein the first reference voltage generator and the second reference voltage generator are provided as common reference voltage generators with a reference voltage generator for generating a first reference voltage and a second reference voltage both for use by the local D/A converters, and a capacitance element for stabilizing the generated reference voltages is connected between the output terminal of the first reference voltage generator and that of the second reference voltage generator.

Semiconductor integrated circuit for communication including analog-to-digital conversion circuit

An image input system includes a solid state image pickup device and a preprocessor for performing correlated double sampling amplification on an output of the image pickup device and outputting a video signal. The preprocessor has a correlated double sampling amplifier for outputting signal information corresponding to a difference voltage between the black level in a feedthrough period of the image pickup device and a signal level in a charge signal output period; and an offset cancelling circuit for cancelling an offset voltage corresponding to the difference voltage in a state where the image pickup device is optically interrupted to the input terminal of the correlated double sampling amplifier. The correlated double sampling amplifier cancels out the offset voltage and the offset cancelling voltage as signal components of polarities opposite to each other, so that circuits following the correlated double sampling amplifier are not influenced by the offset voltage.

Image input system

An analog-to-digital converter receiving an analog signal and producing a digital output signal corresponding to a value of the analog signal includes a plurality of sets each having a plurality of sample-and-hold circuits having inputs connected in parallel with each other, an analog switch responsive to a control signal to apply the input analog signal to the junction of the parallel connection of the plurality of sample-and-hold circuits, and a plurality of encoders respectively connected to outputs of the plurality of sets to convert output signals of the plurality of sample-and-hold circuits into a binary signal. Each of the plurality of sample-and-hold circuits includes a series connection of a second analog switch and a capacitor and the analog-to-digital converter further includes comparators connected to outputs of the plurality of sample-and-hold circuits. Advantageously, errors in timing for sampling conducted in the plurality of sample-and-hold circuits can be eliminated.

Analog-to-digital conversion method and apparatus with a controlled

Growing community of inventors

Takasaki, Japan

Kouichi Yahagi