Fujitsu Corporation

Kyushu Fujitsu Electronics Limited

Kouichi Takeshita

Masanori Yoshimoto

Junichi Kasai

Mitsutaka Sato

Kazuto Tsuji

Masao Sakuma

A semiconductor device includes a semiconductor chip having top and bottom surfaces, upper leads electrically coupled to the semiconductor chip, where a first gap is formed between the upper leads and the top surface of the semiconductor chip, lower leads electrically coupled to the semiconductor chip, where a second gap is formed between the lower leads and the bottom surface of the semiconductor chip, and an encapsulating resin which encapsulates the semiconductor chip so as to maintain the first and second gaps.

Semiconductor device affixed to an upper and a lower leadframe

A process for manufacturing semiconductor device including a semiconductor chip having top and bottom surfaces, upper leads electrically coupled to the semiconductor chip, where a first gap is formed between the upper leads and the top surface of the semiconductor chip, lower leads electrically coupled to the semiconductor chip, where a second gap is formed between the lower leads and the bottom surface of the semiconductor chip, and an encapsulating resin which encapsulates the semiconductor chip so as to maintain the first and second gaps.

Process for manufacturing a semiconductor device affixed to an upper and

A lead frame for manufacturing a semiconductor device has at least one set of substantially parallel leads having inner ends for connection to a semiconductor chip, outer ends for external connection and central portions therebetween and an outer tiebar interconnecting the outer ends and having an elongated guide hole therein, the longer dimension of the guide hole being parallel to the leads. A lead bending die has a locating pin respectively corresponding to and received in sliding engagement in each guide hole. The die maintains a center portion of them lead frame in a first plane and, with each locating pin remaining in sliding engagement within the respective, elongated guide hole, bends the central portions of the leads thereby to dispose the respective outer ends of the leads in a second plane, displaced from the first plane. The outer tiebar and the sliding engagement of the locating pin in the guide hole serve to prevent undesirable deformation of the leads as a result of the bending operation. The central surface portion of the die further includes a recess for receiving at least a part of a package which seals a semiconductor chip therewithin. The lead frame may include plural sets of substantially parallel leads with corresponding outer tiebars and associated guide holes extending from respective, plural edges of the package.

Growing community of inventors

Satsuma, Japan

Kouichi Takeshita