Panasonic Liquid Crystal Display Co., Ltd.

Hitachi Displays, Ltd.

Japan Display Inc.

Hitachi Ulsi Systems Co., Ltd.

Renesas Electronics Corporation

Renesas Technology Corp.

Kouichi Kotera

Hiroko Sehata

Yoshihiro Kotani

Mitsuru Goto

Yoshinori Aoki

Shuuichirou Matsumoto

Kazuo Ookado

Shouji Nagao

Kenichi Akiyama

Arata Kinjo

Hitoshi Oda

Masuhiro Endo

Yukihide Ode

Hidetoshi Kida

Gou Yamamoto

Shigeru Itou

A drive circuit of a display device includes decoder circuit which outputs a voltage based on a 8-bit digital value. The decoder circuit includes a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit.

Display device

The present invention relates to enhancing low power consumption of a display device having a SRAM. The display device includes a drive circuit receiving video data; video lines connected the drive circuit; and pixels connected to the video signals. The drive circuit includes a memory storing the video data in memory cells. Each memory cell includes a first inverter with input and output terminals connected to first and second nodes, respectively. A second inverter has output and input terminals connected to the first and second nodes, respectively. A First and second transistors between a first data line and the first node each have a control terminal connected to a first word line or a third word line, respectively. Third and fourth transistors between a second data line and the second node each have a control terminal connected to a second word line or a fourth word line, respectively.

Liquid crystal display device with decreased power consumption

A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.

A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.

A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.

Semiconductor integrated circuit, liquid crystal drive device, and liquid crystal display system

A display device includes a drive circuit to which video data is supplied from the outside; video lines to which video signals outputted from the drive circuit are supplied; and pixels to which the video signals are supplied through the video lines. The drive circuit includes a static random access memory which stores the video data in memory cells. The drive circuit is configured to perform writing only on selected memory cells that are connected to shared writing and reading word lines, to drive other memory cells connected to the shared writing and reading word lines and not selected to perform writing to output video data respectively stored therein to a reading data line, and then to rewrite the video data back to the non-selected memory cells, without precharging the memory cells that are connected to shared writing and reading word lines.

A display device which transmits display data to drive circuits which drive a display panel using low voltage differential signals have input circuits which are hardly influenced by noise. To transmit the low voltage differential signals under the same condition, low voltage differential signal lines are formed in a zigzag pattern so as to make the lengths of the lines equal. To reduce the influence generated by the overlapping of the zigzagged low voltage differential signal lines and the drive circuits, level shift circuits are provided to the input circuits so as to make the input signals assume a stable operation level.

Growing community of inventors

Kokubunji, Japan

Kouichi Kotera