Hitachi, Ltd.

Hitachi Video and Information System, Inc.

Hitachi Video Information System, Inc.

Kouichi Ishibashi

Kenji Katsumata

Shigeru Hirahata

Haruki Takata

Mituo Konno

Takaaki Matono

Toshinori Murata

Takanori Eda

Kazuhiro Kaizaki

Sunao Suzuki

Shinobu Torikoshi

Atushi Haratani

To provide an image which is matched with an aspect ratio of a screen of a display unit by compressing and enlarging the whole of the image to a desired size. A video signal is sequentially written into a field memory in response to a write clock from an input terminal. A clock generating circuit supplies the field memory with a read clock having a frequency which is about 4/3 times as high as that of the write clock. A vertical enlargement control circuit reads a video signal from the field memory with a line period corresponding to a magnification factor and inhibits writing to a one-line memory with the same period to provide a line delayed output for an output signal from the field memory. A vertical interpolating circuit generates a scanning line signal by an interpolation operation in accordance with a control signal from the vertical enlargement control circuit.

Television receiver capable of enlarging and compressing image

A wide-screen television receiver capable of converting a TV signal of a non-aspect ratio into a signal of a wide aspect ratio which can be displayed on a wide screen of the wide aspect ratio and previously visually informing the user of what part of the image of the non-aspect ratio TV signal is converted in its aspect ratio and displayed on the wide screen. The receiver includes the interpolation scan speed conversion circuit, the mode setting circuit, the aspect ratio converting circuit, the wide cursor adding circuit and the wide display. The interpolation scan speed conversion circuit makes a series of processes such as Y/C separation and scan line interpolation for the input video signal supplied via the input terminal. The aspect ratio converting circuit compresses the video signal from the interpolation scan speed conversion circuit in the horizontal direction by use of a memory. The magnification processing circuit is provided after the aspect ratio converting circuit. This magnification processing circuit magnifies the horizontally compressed video signal so that an arbitrary part of image specified by the mode setting circuit can be magnified at given magnification powers in the horizontal and vertical direction. The wide screen display displays the magnified image of the video signal without horizontal and vertical distortions on the wide screen.

Wide-screen television receiver with aspect ratio conversion function

A video signal processing circuit is provided to display an image of a standard television signal on a display unit with a 6:9 aspect ratio by enlarging an image of a video signal in the horizontal and vertical directions by a magnification factor which depends on the feature of the standard television signal. The processing circuit includes a first memory circuit which reads out the stored video signal in response to a read clock different from the write clock and generated by a stable frequency source so that the image of the video signal is expanded in the vertical direction, a second memory circuit which implements time-base compression for the output of the first memory circuit and thereafter expands the signal, a spatial filter which implements filtering for the output of the second memory circuit, an enlargement control circuit which control the above-mentioned circuits, and a synchronizing processing circuit. The circuit arrangement enables video signals of various image sizes, such as for movie pictures, to be displayed by signal conversion on a display unit with a 16:9 aspect ratio, and is capable of suppressing jitters of video signals.

Compatible wide aspect ratio receiver with spatial filtering for

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Chigasaki, Japan

Kouichi Ishibashi