Komatsu Electronic Metals Co., Ltd.

Kouichi Imura

Masahiko Maeda

Hisaya Fukunaga

Akihiro Ishii

Hiroaki Yamamoto

Takamitsu Harada

A method for manufacturing semiconductor wafers is provided. According to this invention, wafers are obtained by slicing a single-crystal semiconductor ingot. The sliced wafers are beveled at their peripheral rims. The beveled wafers are flattened by a lapping process. The front and the rear surfaces of the flattened wafers are spin-etched with an acid etchant liquid. The glossiness of the rear surfaces of the spin-etched wafers is controlled to a value of 130-300 %. The front surfaces of the wafers whose rear surfaces have been spin-etched are polished, thereby obtaining mirror-polished surfaces. The front surfaces may also be spin-etched prior to polishing.

Semiconductor mirror-polished surface wafers and method for manufacturing the same

A method processes a semiconductor wafer by etching the wafer, which has been smoothed by rough lapping, with alkaline solution. A rod is sliced into a plurality of wafers. The peripheral edges of the wafers are chamfered. The processed strain layers over the wafers due to chamfering are smoothed and planarized. The processed strain layers are then removed by etching with alkaline solution. The etched wafers are mirror polished. Lastly, the mirror-polished wafers are cleaned.

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Miyazaki, Japan

Kouichi Imura