Kabushiki Kaisha Toshiba

Kouhei Morizuka

Toru Sugiyama

Ichiro Omura

Masayuki Sugiura

Yasuhiko Kuriyama

Akio Nakagawa

Hiroshi Iwai

Mitsuhiko Kitagawa

Toshihiko Iinuma

Hiroomi Nakajima

Yasuhiro Katsumata

Yoshikazu Tanabe

Kazumi Inou

Wataru Saito

Takeshi Miyagi

Tetsuro Nozu

Motoyasu Morinaga

Riichi Katoh

Kunio Yoshihara

Yuji Iseki

Yasushi Shizuki

Mitsuo Konno

Yasuo Ashizawa

Junko Akagi

Kunio Tsuda

Mamoru Kurata

Eiji Takagi

Takeshi Hanawa

Yasuhiro Kuriyama

A multi-layered structure in which a p-3C-SiC layeris formed above a p-Si substrateis formed, above which an I-GaN layer (channel layer), an n-AlGaN layer (barrier layer)are formed. A source electrode, a drain electrode, and a gate electrodeare formed above the n-AlGaN layer. The source electrodeand the drain electrodeform an ohmic contact with the n-AlGaN layer. The gate electrodeforms a Schottky junction with the n-AlGaN layer

Nitride semiconductor device

According to the present invention, there is a provided a semiconductor device having, a collector contact layer made of an n-type GaAs layer; a first collector layer formed on the collector contact layer and made of an n-type GaAs layer; a second collector layer formed on the first collector layer and made of a p-type GaAs layer; a third collector layer formed on the second collector layer and made of an n-type InGaP layer; a fourth collector layer formed on the third collector layer and made of an n-type InGaP layer having an impurity concentration higher than that of the third collector layer; a fifth collector layer formed on the fourth collector layer and made of an n-type GaAs layer; a base layer formed on the fifth collector layer and made of a p-type GaAs layer; and an emitter layer formed on the base layer and made of an n-type InGaP layer.

Semiconductor device suited for a high frequency amplifier

A high frequency semiconductor module, includes: a semiconductor chip having top and bottom surfaces; a semiconductor element merged in the semiconductor chip; a ground pad of the semiconductor element disposed on the top surface; a metal layer configured to connect to the ground pad and extend to sidewalls of the semiconductor chip; a ground metal arranged on a surface of a mounting substrate; and a conductive material formed on the ground, configured to connect the metal layer and the ground metal.

High frequency semiconductor module, high frequency semiconductor device and manufacturing method for the same

The object of the present invention is to provide a bipolar transistor which is excellent in uniformity of current distribution in spite of a small ballast resistance, and can constitute an amplifier showing high efficiency and low distortion with little deterioration of distortion even when a digital modulation wave is input thereto. A high frequency power amplifier of the present invention comprises a plurality of transistor blocks having a bipolar transistor, wherein each of the transistor blocks includes a resistance connected to an emitter of the bipolar transistor, a reference voltage generation circuit for generating a reference voltage as a base bias of the bipolar transistor, and a bias generation circuit connected to a base of the bipolar transistor, the bias generation circuit generating a base bias voltage by converting the reference voltage.

High frequency power amplifier having a bipolar transistor

A semiconductor device is provided having a high-frequency amplifying bipolar transistor ( ) with its emitter electrode grounded. A current mirror circuit including a bipolar transistor ( ) supplies the transistor ( ) with a base potential as bias voltages for operating as a Class B or Class AB amplifier. A thermal linkage is established between the transistor ( ) and the transistor ( ) to reduce a difference between their junction temperatures. A metallic layer ( ) is provided as a means for establishing the thermal linkage. The transistor ( ) is provided between fingers ( A) and ( B) of the transistor ( ) as another means for establishing the thermal linkage. A distance between the transistor ( ) and one of the fingers ( A) and ( B) of the transistor ( ) is made smaller than the thickness of a semiconductor substrate ( ) on which the transistors are formed as other means for establishing the thermal linkage.

Semiconductor device

On an n-type semiconductor substrate 41 doped in high density, a p-type semiconductor layer 2, an n-type semiconductor layer 4 doped in high density, which is a collector, a p-type semiconductor layer 6 doped in high density, which is a base, and the n-type semiconductor layer 7, which is an emitter, are sequentially stacked. To the collector layer, a collector electrode 12 is electrically connected, and to the base layer, a base electrode 11 is electrically connected, and to the emitter layer, an emitter electrode 9 is electrically connected, and thus a bipolar transistor is structured. On the bipolar transistor, an insulated isolation area 55 is formed with an opening therein, whose depth reaches the surface of the substrate, and a substrate electrode 48 is formed thereon. On the bipolar transistor and the insulated isolation area 55, an inter-layer dielectric layer 54 is formed having contact holes formed to upper parts of the emitter electrode 49 and to the substrate electrode 48. The emitter electrode 49 and the substrate electrode 48 are connected to each other by ground wiring.

Heterojunction bipolar transistor and manufacturing method thereof

A method for manufacturing a semiconductor device, comprises the steps of: depositing a first insulating film on a semiconductor substrate, and then, applying a photo resist to the first insulating film to align and develop the photo resist to form a first photo resist pattern; side-etching the first insulating film, by a predetermined size from an end portion of the first photo resist pattern, using the first photo resist pattern as a mask; depositing a second insulating film on the entire surface of the semiconductor substrate to form a gap above the semiconductor substrate between the first and second insulating films; removing the first photo resist pattern; and forming a gate electrode.

Semiconductor device and method of manufacturing thereof

A tunnel diode is used as a rectifying device. The tunnel diode is so implemented as to suppress a flow of a current relative to an applied forward voltage of AC which is greater than a voltage at a peak value of a tunnel current. Stated in another word, use is made of a semiconductor of a wide forbidden band width so as to enable the forward turn-on voltage of the diode to be made greater than a maximum value of the applied voltage. Upon application of a reverse voltage to the diode, on the other hand, a greater tunnel current flows from a zero bias time. By connecting the tunnel diode, unlike an ordinary diode, in a reverse-bias fashion in the rectifying circuit, it is possible to realize a rectifying device whose turn-on voltage is zero and to prevent less rectifying efficiency at a power supply circuit of low voltage.

Rectifying device for achieving a high power efficiency

Disclosed in a microwave integrated circuit, having a semiconductor substrate on which a field effect transistor is formed, a micro strip line, a contact hole and an interconnecting line. The microstrip line comprises a ground conductor, a signal line and a dielectric film interposed between the ground conductor and the signal line, and it is laminated on the semiconductor substrate. The contact hole is formed in the micro strip line so that the dielectric film above the field effect transistor is removed, and the interconnecting line is provided in the contact hole for connecting the field effect transistor with the ground conductor or signal line of the micro strip line.

Microwave integrated circuit

Disclosed is an ultra high frequency radio communication apparatus having: a receiver antenna; a transmitter antenna; an IC chip being electrically connected to the receiver antenna and the transmitter antenna; a substrate on which the receiver antenna, the transmitter antenna and the IC chip are mounted; an input terminal for inputting to the IC chip a base band input signal; an output terminal for outputting a base band output signal from the IC chip; and a control signal terminal for inputting a control signal for controlling the IC chip to the IC chip. The IC chip is placed in a shielding space such that the cut-off frequency of the shielding space is higher than the frequency of a carrier signal for radio communication.

Ultra high frequency radio communication apparatus

A bipolar transistor is formed on a silicon substrate having a silicon oxide film. An n-silicon layer having a top surface of a (100) plane is formed on the silicon oxide film and is used as a collector layer. An end face constituted by a (111) plane is formed on the end portion of the collector layer by etching, using an aqueous KOH solution. A B-doped p-silicon layer is formed on the end face by epitaxial growth and is used as a base layer. Furthermore, an As-doped n-silicon layer is formed on the base layer and is used as an emitter layer. Electrodes are respectively connected to the collector, base, and emitter layers.

Semiconductor device and method of manufacturing the same

A high-cut-off frequency, high-speed HBT is obtained by suppressing the diffusion of impurities to the utmost by lowering a heat treatment temperature in the step subsequent to the formation of a high concentration base layer. A base electrode for a base layer is made of a metal or an intermetallic compound which extends the emitter layer to reach at least a part of the base layer. The metal or intermetallic compound forms Schottky barrier with an emitter layer having a wide forbidden width ,and ohmic contacts with the base layer with a narrow forbidden band. The barrier potential of the Schottky junction formed between the intermetallic compound or metal and the emitter layer is higher than the diffusion potential of a pn junction between the base layer and the emitter layer.

Heterojunction bipolar transistor with base electrode having Schottky

A compound semiconductor device wherein a contact to an n type Al.sub.x Ga.sub.1-x As layer comprises an In.sub.x Ga.sub.1-x As graded-composition layer, an In.sub.x Ga.sub.1-x As contact layer having a constant composition and a metal electrode layer, the In.sub.x Ga.sub.1-x As graded-composition layer is doped with an n type impurity which concentration is higher than a concentration of an impurity activated as n type, whereby, even when a thickness of the In.sub.x Ga.sub.1-x As graded-composition layer is made sufficiently small, a reduction in the carrier concentration of the thin graded-composition layer causes no increase of its resistance and a low-resistance contact is realized.

Growing community of inventors

Yokohama, Japan

Kouhei Morizuka