The Boeing Company

Kou-Chuan Chang

Christopher A Young

A method for interconnecting integrated circuits (ICs) mounted on a multichip module so as to minimize spacing between the ICs and maximize their density. A multichip module (20,80) includes a plurality of ICs (22,82) that are mounted on a substrate (24,84). The ICs are electrically connected to pads (28), spaced apart from each other and offset from the boundaries of the ICs to define vertical routing channels (35) and horizontal routing channels (42). The horizontal routing channel includes a top routing channel (36), a bottom routing channel (38), and a central routing channel (40). Initially, a minimal number of tracks are provided in the central routing channel. Each pad has an electrical connection point or pin (44,46) associated with it and the pins are organized into nets. The method provides for dividing the nets into two pin subnets. Each subnet in the horizontal routing channel is assigned to a vertical track so as to minimize violation of a constraint graph. Horizontal tracks are assigned to the subnets so as to minimize an associated element in a COST matrix of subnets and tracks. The method uses a conventional maze router approach to connect pins in subnets not otherwise connected. If any subnet then still remains unconnected, an additional track is added to the central routing channel and the steps of method are then repeated. Use of the top and bottom routing channels reduces the need for routing interconnections through the central routing channel and thus allows the ICs to be mounted more closely together.

Efficient method for multichip module interconnect

For air-bridges running orthogonally to the channel, a detailed routing of the interconnect lines is performed. A post expansion is then performed to spread existing lines by adding more tracks if required for support posts. The interconnect lines are then scanned to determine post placements. For air-bridges running parallel to the channel, empty post positions are determined and aligned to optimize the distance between positions. Detailed routing is then performed and the lines are scanned to determine post placement. Finally, cell rows and interconnects are compacted.

Growing community of inventors

Renton, WA, United States of America

Kou-Chuan Chang