Seiko Instruments Inc

Sii Semiconductor Corporation

Ablic Inc.

Seiko Instrumants Inc.

Kotaro Watanabe

Makoto Mitani

Masaya Murata

Fumiyasu Utsunomiya

Kazumi Sakumoto

Teruo Suzuki

Minoru Sano

Yukimasa Minami

Tomohiro Oka

Yoichi Mimuro

Sukhwinder Singh

A reference voltage circuit includes a first output terminal from which a first reference voltage is supplied; a first MOS transistor of a depletion type, the first MOS transistor containing a drain connected to a power supply terminal, a gate connected to a ground terminal, and a source; a first voltage drop circuit including a first end connected to the source of the first MOS transistor and a second end connected to the first output terminal; and a second MOS transistor of a depletion type, the second MOS transistor containing a drain connected to the first output terminal, a gate connected to the ground terminal, and a source connected to the ground terminal.

Reference voltage circuit and power-on reset circuit

A power supply circuit including an input terminal, an output terminal, a power output circuit, and a mode selection circuit. In the power supply circuit, the mode selection circuit is configured to supply a signal indicating whether the power output circuit is operated as a charge pump-type power output circuit or a series regulator-type power output circuit, and a voltage applied from the input terminal is stepped up or down by the power output circuit and then provided to the output terminal.

Power supply circuit

An oscillation circuit small in circuit scale and in the influence of temperature on its oscillation frequency is provided. The oscillation circuit includes: a constant current circuit configured to supply a current based on a first depletion MOS transistor; a charge/discharge circuit having a first capacitor, a second capacitor, a second depletion MOS transistor, and a third depletion MOS transistor provided in a current path for charging the second capacitor, the first to third depletion MOS transistors having the same threshold voltage and the same temperature characteristics of the threshold voltage; and an RS latch circuit configured to output a waveform that falls by input of the reset signal and rises by input of the set signal.

Oscillation circuit

Provided is a power supply circuit including a series regulator step-down power circuit, a charge pump step-up power circuit, and a voltage selection circuit to which a voltage of an input terminal and a voltage of an output terminal are supplied and configured to output a higher voltage from the supplied voltages. A connection point of a first resistor and a second resistor which are connected between the output terminal and a ground terminal is connected to an input of a differential amplifier circuit. An output of the differential amplifier circuit is connected to a gate terminal of an output transistor via a first switch. An output of the voltage selection circuit is connected to the gate terminal of the output transistor via a second switch. The output of the voltage selection circuit is connected to a substrate electrode of the output transistor.

An electronic timepiece includes a first switch connected to a signal line, a second switch, and a one-shot pulse signal generation circuit. The first switch is inserted into the signal line. One end of the second switch is connected to the signal line at a rear stage of the first switch, and the other end of the second switch is connected to a power source. The one-shot pulse signal generation circuit generates a one-shot pulse signal by using a reference clock signal, and the second switch is controlled by the one-shot pulse signal. The timepiece device can reduce currents flowing in a pull-down resistor or a pull-up resistor when a crown switch is turned on.

Electronic timepiece

To provide a voltage detection circuit in which the influence on a detection voltage by semiconductor manufacturing variations is small and which is small in current consumption. A voltage detection circuit is provided which detects a voltage, based on an output signal of a detection circuit and outputs a detection signal. The detection circuit includes a first MOS transistor unit which allows a first current to flow, a second MOS transistor unit which allows a second current to flow, and a current voltage conversion unit which converts each of the first current and the second current into a voltage and outputs the same as the detection signal. A voltage characteristic of the first current and a voltage characteristic of the second current are configured so as to be crossed with each other at a predetermined voltage.

Voltage detection circuit

Provided are a constant voltage circuit configured to, when a power supply voltage is low, detect a leakage current to output a stable voltage at a power supply voltage level, and a crystal oscillation circuit using the constant voltage circuit. The constant voltage circuit includes a leakage current detection circuit including a PMOS transistor for monitoring a leakage current, which has a gate and a source being grounded. When a leakage current is detected, even with a constant voltage power supply, a voltage sufficient for turning on an output transistor of the constant voltage circuit can be applied to a gate of the output transistor.

Constant voltage circuit and oscillation device

Provided is a flip-chip mounted semiconductor device in which a crack is less likely to develop. Flip chip mounting is carried out under the condition that no oxide film exists on the scribe region so as to eliminate the interface between the oxide film that remains on the scribe region and the silicon substrate from which a crack may develop. As a result, the circuit board, the encapsulant, and the silicon substrate are stacked at an end portion of the semiconductor chip.

Flip-chip mounted semiconductor device

To provide a crystal oscillation circuit low in current consumption and stably short in oscillation start time. A crystal oscillation circuit is equipped with a crystal vibrator, a feedback resistor, a bias circuit, a constant voltage circuit, and an oscillation inverter configured by a constant current inverter. The oscillation inverter is configured so as to be controlled by currents based on input signals from the bias circuit and the crystal vibrator and driven by an output voltage of the constant voltage circuit.

Crystal oscillation circuit and electronic timepiece

Provided is a data readout circuit capable of, even when a high voltage is applied during data read-out operation, preventing erroneous writing of the data and reading out the data correctly. The data readout circuit includes: a non-volatile storage element; a latch circuit including: an input inverter; an output inverter; and a MOS transistor; a first MOS transistor connected between the non-volatile storage element and the latch circuit; a second MOS transistor connected between the latch circuit and the first power supply terminal; a first bias circuit configured to bias a gate of the first MOS transistor; and a second bias circuit configured to bias the MOS transistor in the latch circuit, each of the first bias circuit and the second bias circuit being configured to output a predetermined bias voltage when the data in the non-volatile storage element is read out.

Data readout circuit of a storage device for read-out operation for preventing erroneous writing into a data storage element and reading out of the data correctly

The present invention provides a data reading device capable of preventing erroneous writing during an operation of reading data from a non-volatile memory element. The data reading device includes a dummy reading circuit provided with a non-volatile memory element, the writing voltage of which is lower than that of a non-volatile memory element of a data reading circuit, and a state detection circuit that detects a written state of the non-volatile memory element of the dummy reading circuit. Upon detection of erroneous writing to the non-volatile memory element of the dummy reading circuit during a data reading operation, the data reading operation is immediately terminated.

Data reading device and semiconductor device

The semiconductor device includes the charging system including: electric power generating unit for supplying electric power; electric power storing unit for storing electric power generated by the electric power generating unit; switch unit provided in a charging path for charging the electric power storing unit with the electric power generated by the electric power generating unit; a comparator driven by the electric power generated by the electric power generating unit for comparing a reference voltage and a stored voltage of the electric power storing unit; and a level converter provided between the comparator and the switch unit for, based on a result of a comparison made by the comparator, converting a level of a generated voltage to a level of the stored voltage and outputting a resultant signal to the switch unit.

Semiconductor device including charging system

To provide an analog electronic timepiece which prevents a crystal oscillation circuit from malfunctioning even if a battery voltage is lowered at motor loading. An analog electronic timepiece is equipped with a crystal vibrator, an oscillation circuit, a frequency division circuit, a constant voltage circuit, an output control circuit, and a motor. The analog electronic timepiece is configured in such a manner that the constant voltage circuit has a voltage holding circuit connected between a gate of an output transistor and a power supply terminal, and the oscillation circuit and the frequency division circuit are operated with a constant voltage generated by the constant voltage circuit as a power supply.

Analog electronic timepiece

There are provided a constant voltage circuit that features low current consumption and stable operation, and an analog electronic clock provided with the constant voltage circuit. The constant voltage circuit includes a differential amplifier circuit which is turned on/off by a predetermined signal and which controls the voltage of a gate of an output transistor on the basis of a reference voltage and a feedback voltage that are received, a switch circuit which is connected to an output terminal of the differential amplifier circuit and which is turned on/off by a predetermined signal, and a voltage holding circuit which is connected between the gate of the output transistor and a power supply terminal and which has a resistor and a capacitor connected in series. An analog electronic clock provided with the foregoing constant voltage circuit that supplies a voltage to at least an oscillation circuit and a frequency division circuit.

Constant voltage circuit and analog electronic clock

Provided is a readout circuit capable of detecting inversion of retained data caused by a noise, such as static electricity. The readout circuit is configured to retain opposing data in a first latch circuit and a second latch circuit in a readout period so as to be capable of detecting an anomaly of the retained data by making use of the fact that the data in the first latch circuit and the second latch circuit are inverted in the same direction due to a noise, such as static electricity.

Growing community of inventors

Chiba, Japan

Kotaro Watanabe