Hitachi, Ltd.

Renesas Electronics Corporation

Renesas Technology Corp.

Hitachi Construction Machinery Co., Ltd.

Kotaro Shimamura

Takashi Hotta

Nobuyasu Kanekawa

Hiromichi Yamada

Yuichiro Morita

Kohei Sakurai

Yasuhiro Nakatsuka

Shigeya Tanaka

Shoji Sasaki

Hideo Sawamoto

Kunihiko Tsunedomi

Masatoshi Hoshino

Teppei Hirotsu

Toshimichi Minowa

Mutsumi Kikuchi

Fumio Murabayashi

Shigeo Moriyama

Yoshiaki Takahashi

Kenichi Kurosawa

Akira Bando

Kentaro Yoshimura

Shigeta Ueda

Shinya Imura

Yusuke Kanno

Tadanobu Toba

Takanori Yokoyama

Tsutomu Yamada

Ryo Fujita

Hirokazu Suzuki

Toshihiko Kurihara

Koji Saito

Akiyoshi Osumi

Yoshitaka Takahashi

Tetsuya Shimomura

Hidemitsu Naya

Dai Fujii

Rikio Tomiyoshi

Yuichi Ishiguro

Takeshi Takehara

Takanaga Yamazaki

Kazuhiro Imaie

Mitsuyasu Kido

Kesami Hagiwara

Satoshi Tanaka

Hidehito Takewa

Yoshikazu Kiyoshige

Tatsuki Inuduka

Kazuo Fujishima

Hiroshi Arita

Naoki Yada

Kenichi Shimbo

Koji Sakamoto

Teruaki Sakata

Ryo Yamagata

Masahiro Matsubara

Kazumi Hatayama

Keiichi Katsuta

Michinobu Nakao

Haruyuki Nakayama

Yasuwo Watanabe

Kazunori Hikone

Katsuichi Tomobe

Yuuichiro Morita

Naohiro Ikeda

Seiji Kobayashi

Hiroyasu Satou

Noboru Sugihara

Naoki Kurihara

Yamada Hiromichi

The present invention aims to provide a programmable device with a configuration memory that can hold the state of the occurrence abnormal situation that is difficult to assume such as a failure occurring in the programmable device due to the terrestrial radiation of the configuration memory, even during power off, in order to improve the reproducibility in device testing based on the held error information. The programmable device with the configuration memory includes: an error detection section for detecting an error in the configuration memory, and outputting the detected error as well as an address in which the error occurred, as error information; and an error information holding section provided with a non-volatile memory to store the output error information.

Programmable device, error storage system, and electronic system device

An object of the present invention is to provide a high reliable/high safe programmable logic device with high error resistance. The present invention provides a programmable logic device that has a plurality of configuration memories. The configuration memories are divided into a plurality of areas and are arranged and a part of the plurality of areas is set to a high reliable area where reliability of the configuration memory is higher than in the other area.

Programmable logic device and logic integration tool

A vehicle control system which can ensure high reliability, real-time processing, and expandability with a simplified ECU configuration and a low cost by backing up an error through coordination in the entire system without increasing a degree of redundancy of individual controllers beyond the least necessary level. The vehicle control system comprises a sensor controller for taking in sensor signals indicating a status variable of a vehicle and an operation amount applied from a driver, a command controller for generating a control target value based on the sensor signals taken in by the sensor controller, and an actuator controller for receiving the control target value from the command controller and operating an actuator to control the vehicle, those three controller being interconnected via a network. The actuator controller includes a control target value generating unit for generating a control target value based on the sensor signals taken in by the sensor controller and received by the actuator controller via the network when the control target value generated by the command controller is abnormal, and controls the actuator in accordance with the control target value generated by the control target value generating unit.

Vehicle control system

To provide a system for controlling a construction machine, which can be implemented inexpensively, can detect a failure in any of pressure sensors, controllers, an inverter device, and an electric motor for swing, and can secure safety and required workability for an operator. Redundant hydraulic pressure sensorsprovide input to a first controllerfor calculating a swing command, and a second controllerprovided in an inverter devicefor controlling an electric motorfor swing. The second controllerdetects an abnormality in any of the hydraulic pressure sensorsand the first controllerby a process for determining the validity of a swing command signal, and allows the swing operation to continue by using a signal from the second hydraulic pressure sensorwhen determination is made based on the contents of the abnormality that the electric motorfor swing can operate normally.

System for controlling construction machine

A microcontroller capable of improving processing performance as a whole by executing different programs by a plurality of CPUs and capable of detecting abnormality for safety-required processing by evaluating results of the same processing executed by the plurality of CPUs. A plurality of processing systems including CPUs and memories are provided, data output from the CPUs in each of the processing systems is separately compressed and stored by compressors for each of the CPUs, respectively. The compressed storage data is mutually compared by a comparator, and abnormality of processing can be detected when the comparison result indicates a mismatch. Even when the timings by which the same processing results are obtained are different when the plurality of CPUs asynchronously execute the same processing, the processing results of both of them can be easily compared with each other since compression is carried out by the compressors. Moreover, since the comparison of the comparator is enabled when comparison enable is given from all the CPUs, the comparison operation result can be obtained based on the timing at which the results of compression by the plurality of compressors are determined.

Multi-core microcontroller having comparator for checking processing results

A computer system which shortens standby time of CPUs and improves CPU processing efficiency of a performance mode upon switching from the performance mode (parallel operation) to a safety mode (master/checker operation) is provided. In a computer system including: at least two CPUs; a programmable interrupt controller for interrupting the CPUs; and a comparator for mutually comparing outputs of the CPUs, switching between the performance mode of executing mutually different processes by the CPUs, respectively, to improve performance and the safety mode of executing mutually the same processes by the CPUs and collating results by the comparator to detect failure can be carried out; CPUs to be interrupted can be set for each interrupt factor; and whether the performance mode is to be executed or the safety mode is to be executed can be set for each interrupt factor.

Computer system including an interrupt controller

Multi-core microcontroller having comparator for checking processing result

The electronic controller fetches an external signal and performs an input process such as A-D conversion. Upon receipt of processing results for executing operations according to a predetermined program, an output process is performed for sending a signal to the outside board on operation results, a timer outputs at least two of an input process start signal for starting the input process, an output process start signal for starting the output process, and an operation start signal for starting the operation.

Electronic controller for power converter and motor drive circuit

There is provided a distributed system having a plurality of nodes connected by a network. Each of the nodes includes: a common-parameter-value determining unit for determining a common-parameter-value from values of a parameter (each value being possessed by a corresponding one of the nodes); a common-operation execution unit for executing a common-operation using, as its input, a value of the parameter or the common-parameter-value; a send/receive unit for exchanging, via the network, the parameter values used for the determination of the common-parameter-value and the results of the common-operation execution with the other nodes; and a fault identification unit that compares the common-operation execution results collected from all the nodes and determines that an error occurs if not all the results are the same.

Distributed control system

There is provided a technique which reduces an average processing time of low-priority accesses with suppressing an average delay increase of a high-priority access processing even in a case where high-priority access request and a low-request access request are simultaneously generated to a shared access processing unit and high-priority accesses are continuously generated. And, there is provided an access arbitration equipment comprising: an issued access request retention unit; a first interval determination circuit; and a second interval determination circuit. In a case where the first interval determination circuit determines that an interval is generated between an issued access processing and a most prior access processing and a second interval determination circuit determines that no interval is generated between the issued access processing and a second-prior access request, the priority order of the most prior access request and the second-prior access request is changed.

Arbiter and arbitration method of multiple data accesses

This invention provides communications systems that enable broadcasting while making use of the simplicity of the prior art and also provides control devices and information processing systems incorporating the communications system. In this invention, chip-select signals are provided for transmitting (TXCSi) and receiving (RXCSi) independently as well as for individual chips as in the prior art. That is, a group of signals indicating whether or not a slave node is selected as the node to transmit signals to a master node and the direction of communications are output from the master node to the slave node.

Communications system, and information processing device and control device incorporating said communications system

A semiconductor production system has a semiconductor manufacturing apparatus having an exposure unit, a control unit for controlling the exposure unit and a storage device; a semiconductor inspection apparatus having an observation unit, a control unit for controlling the observation unit and a storage device; and a storage device commonly used by the semiconductor manufacturing apparatus and the semiconductor inspection apparatus. The manufacturing apparatus, the inspection apparatus and the commonly used storage device are interconnected via a storage area network. With the semiconductor manufacturing apparatus and the storage device linked together via the storage area network, a large volume of image data or design data can be communicated at high speed, thus improving the system throughput.

Semiconductor production system

Growing community of inventors

Hitachinaka, Japan

Kotaro Shimamura