Texas Instruments Corporation

Siliconsystems, Inc.

Koshiro Saeki

Ryohei Kuki

Michael J Palmer

A post-processing method and circuit () for correcting media noise errors and producing a corrected recovered data output signal () is disclosed for use in a sampled data read channel of a mass data storage device. The mass data storage device has a Viterbi detector () that receives actual sampled partial response target data () from a data medium of a mass data storage device. A recovered partial response target signal derived from the recovered data output signal and the sampled partial response target data is filtered to produce a filtered output signal (). A threshold circuit () provides a threshold against which the filtered output signal is compared, and a predetermined value () is added to the filtered output signal when a predetermined error event pattern due to media noise or other transition jitter occurs in the recovered data output signal (). The recovered data output signal is modified () when the filtered output signal exceeds the threshold of said threshold circuit ().

Media noise post-processor with varying threshold

A method for writing data to a mass data storage device ( ) includes applying a maximum transition run length code constraint to the data to be written, generating parity data based on the data, and inserting the parity data into the data to be written ( A-C). The parity data is used in conjunction with a post-processor ( ) to detect and correct errors in the read back data.

METHOD AND CIRCUIT FOR INCLUDING PARITY BITS IN WRITE DATA OF A MASS DATA STORAGE DEVICE, OR THE LIKE, USING A 48/54 MTR (3:K) CODE CONSTRAINT, AND POST-PROCESSING CIRCUIT AND METHOD FOR PROCESSING READ BACK DATA THAT INCLUDES SAID CODE CONSTRAINT

This invention relates to improvements in servo Gray code detection techniques in rotating data storage drives such as hard disk drives, or the like. The detection technique uses a rate &frac14; Gray code servo signals equalized to a PR4 target, and a matched filter detector, and can realize a servo Gray code detector having high speed and performance. The Gray code detector (,) has an input (,) for receiving an input signal containing a Gray code that has been equalized to a PR4 target and a circuit (,) for processing said input signal to determine a maximum Euclidean distance from zero to a value of the Gray code. The construction of the detector (,) depends upon the particular Gray code that is employed. A threshold detector (,) determines whether the determined Euclidean distance exceeds a predetermined threshold, and produces a first output signal if the Euclidean distance exceeds the predetermined threshold and to produce a second output signal if the Euclidean distance does not exceed the predetermined threshold. An exclusive-or gate (,) may also be provided if the Gray code results in negative output numbers to compare an output of said comparator to an alternating sequence of zero and one.

Synchronous servo gray code detector using a PR4 matched filter

A magnetic recording system with a rate 16/17(0,6/8) encoder/decoder modulation code. This modulation code has a low k constraint for synchronization of a road clock of the magnetic recording system. Furthermore, this magnetic recording system has a low hard error rate due to low 3- and 4-byte error propagation. The digital logic circuit for the encoder/decoder system is elegantly simple. Such simplicity reduces propagational delays and circuit size, as measured in number of logic gates. The modulation code is implemented with a decoder that includes a lower byte decoder and an upper byte decoder. An input of the upper byte decoder is in part coupled to and in part decoupled from the lower byte decoder. Similarly, an input of the lower byte decoder is in part coupled to and in part decoupled from the upper byte decoder.

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Irvine, CA, United States of America

Koshiro Saeki