Murata Manufacturing Co., Ltd.

Koshi Himeda

Takeshi Furukawa

Atsushi Kurokawa

Kenji Nishiyama

Kazuya Kobayashi

Tatsuya Kitamura

Atsushi Yamamoto

Masayuki Aoike

Tatsuya Funaki

Shinya Kiyono

Sho Fujita

Chiharu Sakaki

Kinya Aoki

Satoshi Arayashiki

Fumio Harima

Mari Saji

Yusuke Tanaka

Mitsunori Samata

Hayami Kudo

Koichi Yamaguchi

Tsunekazu Saimei

Yoshimitsu Ushimi

Yoshinori Ueda

Nobuyoshi Okuda

Toshihiro Tada

Hideyuki Sato

Akitomo Takahashi

Jyou Kikura

Kenji Fujimoto

Tetsuro Toritsuka

Shinji Kaburaki

Hisaki Kitagawa

A semiconductor composite device includes active elements and passive elements constituting a voltage regulator and disposed in association with a plurality of channels, a load to be supplied with a direct-current voltage regulated by the voltage regulator, and a wiring board electrically connected to the active elements, the passive elements, and the load. A plurality of capacitors disposed in the channels include an integrally formed capacitor array including a plurality of capacitor portions disposed in a plane. The capacitor array includes a plurality of through hole conductors extending through the capacitor array in a direction perpendicular to a mounting surface of the wiring board. At least a part of the capacitor array is positioned to overlap the load when viewed from the mounting surface of the wiring board.

Semiconductor composite device and method for manufacturing semiconductor composite device

A passive component includes a substrate having insulating properties and having a surface having a recess, a bottom electrode filling at least a portion of the recess, a dielectric film provided on a surface of the bottom electrode, and a top electrode opposite to the bottom electrode with the dielectric film interposed therebetween. In a height direction perpendicular to the surface of the substrate, a dimension of the bottom electrode is larger than a dimension of the dielectric film.

Passive component

A power amplification device includes a first member in which a first circuit is formed, a second member in which a second circuit is formed, and a member-member connection conductor that electrically connects the first circuit and the second circuit to each other. The second member is mounted on the first member. The second circuit includes a first amplifier, which amplifies a radio frequency signal to output a first amplified signal. The first circuit includes a control circuit that controls an operation of the second circuit. At least part of a first termination circuit, which is connected to the first amplifier through the member-member connection conductor and which attenuates a harmonic wave component of the first amplified signal, is formed in the first member.

Power amplification device and an RF circuit module

A capacitor element that includes: a capacitor portion including an anode plate having a porous portion on a core portion, a dielectric layer on the porous portion, and a cathode layer on the dielectric layer; a first cathode through conductor and a second cathode through conductor each penetrating the dielectric layer and the anode plate in a thickness direction and electrically connected to the cathode layer; and an anode through conductor penetrating the dielectric layer and the anode plate in the thickness direction and electrically connected to the anode plate, wherein, in a plan view from a thickness direction of the anode plate, a first center-to-center distance between the first anode through conductor and the first cathode through conductor is equivalent to a second center-to-center distance between the first anode through conductor and the second cathode through conductor.

Capacitor element, module, and semiconductor composite device

A package board that includes an inductor layer having: a first magnetic layer including first magnetic particles and a resin; an inductor wiring that functions as an inductor in the first magnetic layer; and a second magnetic layer on at least one surface of the first magnetic layer, including second magnetic particles that are higher in average flatness than the first magnetic particles and a resin, the second magnetic particles having a shape where the dimension in a direction along the main surface of the second magnetic layer is longer than the dimension in the thickness direction of the second magnetic layer.

Package board

A semiconductor apparatus includes a substrate, plural transistor groups disposed on the substrate, an insulating film, and a metal member. Each of the plural transistor groups includes plural unit transistors arranged in a first direction within a plane of a top surface of the substrate. The plural transistor groups are arranged in a second direction perpendicular to the first direction. The insulating film covers the plural unit transistors and includes at least one cavity. The metal member is disposed on the insulating film and is electrically connected to the plural unit transistors via the at least one cavity. A heat transfer path is formed by a metal in a region from each of the plural unit transistors to a top surface of the metal member. Thermal resistance values of the heat transfer paths are different from each other among the plural unit transistors.

Semiconductor apparatus including different thermal resistance values for different heat transfer paths

A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor that supplies a bias current based on a first current which is a part of a control current to the first transistor; a current output element in which a current flowing therethrough increases in accordance with a rise in temperature; and a wiring portion including a plurality of metal layers that are electrically connected to an emitter of the first transistor and that are stacked one on top of another so as to oppose the semiconductor substrate. At least one metal layer among the plurality of metal layers extends so as to overlap an area extending from at least a part of a first disposition area in which the first transistor is disposed to a second disposition area in which the current output element is disposed in plan view of the semiconductor substrate.

Power amplifier circuit

A semiconductor device includes a substrate having an upper surface on which are arranged first transistors each including a mesa structure formed of a semiconductor. A first bump having a shape elongated in one direction in plan view and connected to the first transistors is arranged at a position overlapping the first transistors in plan view. A second bump has a space with respect to the first bump in a direction orthogonal to a longitudinal direction of the first bump. A first metal pattern is arranged between the first and second bumps in plan view. When the upper surface of the substrate is taken as a height reference, a center of the first metal pattern in a thickness direction has a height higher than an upper surface of the mesa structure included in each of the first transistors and lower than a lower surface of the first bump.

Semiconductor device

A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.

Semiconductor composite device and package board used therein

An optical semiconductor element having a mesa portion includes a substrate and semiconductor layers on the substrate. The optical semiconductor element further includes a first contact electrode, a second contact electrode on the semiconductor layer, first and second lead-out wires connected to the first and second contact electrodes, respectively, and an insulating film covering at least an upper surface of the semiconductor layer and the second contact electrode. The second lead-out wire is connected to the second contact electrode in an opening of the insulating film. An outer peripheral end of the second contact electrode in at least a portion where the second contact electrode and the second lead-out wire are connected is above and outside an outer peripheral end of a connection portion with the semiconductor layer, and an inner peripheral end is above and inside an inner peripheral end of the connection portion with the semiconductor layer.

Optical semiconductor element

An electronic component comprising a coil component having an element body containing ceramic, a coil disposed in the element body, and an external electrode disposed in the element body and electrically connected to the coil; and a mold resin sealing the coil component. The electronic component further comprises an electrode film in contact with an outer surface of the mold resin; and a connection conductor disposed in the mold resin and electrically connecting the external electrode and the electrode film.

Electronic component and method of manufacturing electronic component

An electronic component comprising a main body part including an insulating layer and a conductor layer laminated alternately. The insulating layer and the conductor layer are partially exposed on a side surface of the main body part in a direction orthogonal to a lamination direction. Also, the side surface of the main body part is provided with a metal film extending in the lamination direction to cover the insulating layer and the conductor layer exposed on the side surface.

Electronic component

A semiconductor chip includes a compound semiconductor substrate having a pair of main surfaces and a side surface therebetween, a circuit on one main surface of the pair of main surfaces, and first metals on the main surface. The first metals are positioned, in plan view of the main surface, closer to an outer edge of the main surface than the circuit, substantially in a ring shape to surround the circuit with gaps between first metals adjacent to each other. The semiconductor chip further includes second metals on the main surface. The second metals are positioned, in plan view of the main surface, between the circuit and the first metals or closer to the outer edge than the first metals. Also, the second metals each are positioned, in plan view of the side surface, such that at least a part thereof overlaps a gap between the first metals.

Semiconductor chip

A semiconductor device has bipolar transistors on a substrate. There is also an insulating film on the substrate, covering the bipolar transistors. On this insulating film is emitter wiring, sticking through openings in the insulating film (first openings) to be electrically coupled to the emitter layer of the bipolar transistors. On the emitter wiring is a protective film. On the protective film is a bump, sticking through an opening in the protective film (second opening) to be electrically coupled to the emitter wiring. In plan view, the second opening is included in the area that is inside the bump and outside the first openings.

Growing community of inventors

Nagaokakyo, Japan

Koshi Himeda