Lsi Logic Corporation

Kosala Abeywickrema

Daniel R Watkins

Arvind Bhaskar Patwardhan

Venkat Mattela

Gagan V Gupta

Sophia Kao

Satish Venugopal

Kumar Bhattaram

A multimedia decoder is provided with an audio decoder bypass module for forwarding undecoded audio bitstreams directly to external system components. In one embodiment, the multimedia decoder includes an audio decoder, and a bypass module. The audio decoder operates on the data in an audio bitstream buffer to convert at least a portion of the audio bitstream into a set of digital audio signals. The bypass module is configured to provide the full information content of the audio bitstream to an external system component which may be able to convert a greater portion of the audio bitstream into a second set of digital audio signals. As the audio decoder and bypass module each retrieve data from the audio bitstream buffer, they each use a pointer to track which location of the buffer to access next. The bypass module maintains a loose synchronization with the audio decoder by calculating the difference between the pointers and transmitting the current audio packet only if the magnitude of the difference doesn't exceed a predetermined threshold. If the bypass module is lagging behind the audio decoder by more than the threshold amount, then it skips ahead to the next audio packet. On the other hand, if the decoder is lagging behind the bypass module by more than the threshold amount, the bypass module waits for the audio decoder to catch up. This technique advantageously prevents detectable discrepancies in reproduced audio signals while allowing for system upgradability without significant increase in implementation cost.

Audio decoder bypass module for communicating compressed audio to

The present invention discloses a system to reverse-synthesize a gate level netlist definition of an integrated circuit (IC) design to corresponding register transfer level (RTL) definition of the same circuit. The typical process to implement an integrated circuit is to complete the RTL design first, which is then used, to generate gate level netlist definition, and eventually, a layout level design targeted to a particular process technology. The RTL design definitions, being a general description of the circuit, may be ported to different process technologies. However, the gate netlist level design, being a more specific or lower level definition of the circuit, is not easily ported to other integrated circuit design processes. To port a gate netlist level design to another process technology, the gate netlist should be converted, or reverse-synthesized back to a RTL level design. The present invention describes the method and apparatus to reverse-synthesize gate netlist level definitions into RTL definitions by parsing and analyzing the gate netlist level definition, generating an equivalent RTL definition, and verifying correctness of the RTL definition.

Gate netlist to register transfer level conversion tool

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San Jose, CA, United States of America

Kosala Abeywickrema