Nippon Precision Circuits Inc.

Seiko Npc Corporation

Koryo Tei

Hiroyuki Kawanishi

Kazuya Yano

The present invention is to provide a power down circuit, which can configure a wide range of the voltage of the control signal regardless of the fluctuation of the power supply voltage. In the power down circuit, the drain of the first N channel MOS transistor M, into which the control signal PD is input, is connected to the power supply VDD via the resistor R, and at the same time, connected to the gate of the second N channel MOS transistor M, the source of the second N channel MOS transistor Mbeing connected to the gate of the N channel MOS transistor M, to which the bias voltage VB is supplied, the drain of the N channel MOS transistor Mbeing connected to the power supply VDD via the drain of the P channel MOS transistor M, when the first N channel MOS transistor Mis turned on/off by the control signal PD, the second N channel MOS transistor Mis turned off/on, and the bias circuitis operated under a normal condition when it is off, and comes into a power down state when it is on.

Power down circuit capable of a wide rage control signal regardless of the power supply voltage fluction

An amplification device for a small detection signal has an amplification factor that is variable and also high accuracy offset cancellation. A first switching element selectively connects a normal phase input terminal of an operational amplifier either to a reference potential or to an output terminal of a sensor. An inverse phase input terminal is connected to the reference potential. A capacitor is connected to an output terminal of the operational amplifier and to an output buffer, a second switching element is arranged to selectively connect the capacitor to the reference potential. Resistors are selectively short circuited by switching elements to vary the amplification factor of the operational amplifier.

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Tokyo, Japan

Koryo Tei