Intel Corporation

Konstantin Levit-Gurevich

Orr Goldman

Noam Itzhaki

Arik Narkis

Michael Berezalsky

Gadi Haber

Boris Ginzburg

Esfir Natanzon

Igor Breger

Boaz Ouriel

Moshe Maury Bach

Aya Elhanan

Shay Gueron

Michael Apodaca

John H Feit

David M Cimini

Thomas F Raoux

Israel Hirsh

Sunpyo Hong

Eliezer Weissmann

Alon Naveh

Ronny Ronen

Koichi Yamada

Wei Ey Li

Michael Mishaeli

Rinat Rappoport

Joshua Barczak

Avi Levy

Sion Berkowits

Julia Fedorova

Anton V Gorshkov

Alexander Skaletsky

Stanislav Volkov

Igor Surmin

Scott Pillow

Aleksey Alekseev

A deterministic replay of a multi-threaded trace on a multi-threaded processor is described. An example of a computer-readable storage medium includes instructions to cause at least one processor to receive graphics processing unit (GPU) program code for tracing, the program code including a plurality of instructions; analyze the plurality of instructions to identify instructions of the program code that are events requiring synchronization; instrument each of the identified events to generate instrumented program code; execute the instrumented program code on a plurality of hardware threads of the GPU to generate trace data; and emulate the trace data utilizing an emulator on a plurality of hardware traces of a central processing unit (CPU), including replaying the identified events according to an order of occurrence of the identified events.

Deterministic replay of a multi-threaded trace on a multi-threaded processor

An apparatus and method for improving ray tracing efficiency. For example, one embodiment of an apparatus comprises: An apparatus comprising: a binary instrumentation engine to perform binary instrumentation of ray tracing shaders and to trace execution of the ray tracing shaders to generate execution metrics; call graph construction logic to construct a shader call graph based on the execution metrics; shader source mapping logic to map the shader call graph to shader source code to generate a source code map; efficiency analysis logic to determine inefficiencies in ray tracing shader execution based on the source code map; and optimization logic to identify optimization actions based on the inefficiencies.

Apparatus and method for ray tracing with shader call graph analysis

At least one computer-readable storage medium comprising instructions for execution by at least one graphics processing unit (GPU) that, when executed, cause the at least one GPU to:

Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes instructions, and at least one processor to execute the instructions to determine whether a GPU supports modification of entry point addresses, detect a first entry point address and a second entry point address of an original GPU kernel, create a corresponding instrumented GPU kernel from the original GPU kernel based on the determination by inserting at least one of first profiling initialization instructions or first jump instructions at the first entry point address of the instrumented GPU kernel, inserting at least one of second profiling initialization instructions or second jump instructions at the second entry point address of the instrumented GPU kernel, and inserting profiling measurement instructions into the instrumented GPU kernel.

Methods and apparatus to insert profiling instructions into a graphics processing unit kernel

Methods, apparatus, systems and articles of manufacture are disclosed to generate a graphics processing unit (GPU) long instruction trace (GLIT). An example apparatus includes at least one memory, and at least one processor to execute instructions to at least identify a first routine based on an identifier of a second routine executed by the GPU, the first routine based on an emulation of the second routine, execute the first routine to determine a first value of a GPU state of the GPU, the first routine having (i) a first argument associated with the second routine and (ii) a second argument corresponding to a second value of the GPU state prior to executing the first routine, and control a workload of the GPU based on the first value of the GPU state.

Methods and apparatus to generate graphics processing unit long instruction traces

Embodiments are disclosed for emulation of graphics processing unit instructions. An example method executing an instrumented kernel using a logic circuit, the instrumented kernel including an emulation sequence; saving, in response to determination that the emulation sequence is to be executed, source data to a shared memory; setting an emulation request flag to indicate to processor circuitry separate from the logic circuit that offloaded execution of the emulation sequence is to be executed; monitoring the emulation request flag to determine whether the offloaded execution of the emulation sequence is complete; and accessing resulting data from the shared memory.

Methods and apparatus to emulate graphics processing unit instructions

Disclosed examples to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation include: accessing, via a GPU driver executed by a processor, binary code generated by a GPU compiler based on application programming interface (API)-based code provided by an application; accessing, via the GPU driver executed by the processor, instrumented binary code, the instrumented binary code generated by a binary instrumentation module that inserts profiling instructions in the binary code based on an instrumentation schema provided by a profiling application; and providing, via the GPU driver executed by the processor, the instrumented binary code from the GPU driver to a GPU, the instrumented binary code structured to cause the GPU to collect and store profiling data in a memory based on the profiling instructions while executing the instrumented binary code.

Methods and apparatus to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation

An apparatus to facilitate an update of shader data constants. The apparatus includes one or more processors to detect a change to one or more data constants in a shader program, generate a micro-code block including updated constants data during execution of the shader program and transmit the micro-code block to the shader program.

Dynamic constant update mechanism

Embodiments are disclosed for emulation of graphics processing unit instructions. An example apparatus includes a kernel accessor to access an instruction of an original GPU kernel, the original GPU kernel intended to be executed at a first GPU. An instruction support determiner is to determine whether execution of the instruction is supported by a second GPU different from the first GPU. An instruction modifier is to, in response to determining that the execution of the instruction is not supported by the second GPU, create an instrumented GPU kernel based on the original GPU kernel. The instrumented GPU kernel includes an emulation sequence. The emulation sequence is to, when executed by the second GPU, cause the second GPU to emulate execution of the instruction by the first GPU.

Techniques and apparatus for profiling graphics processing unit (GPU) processes using binary instrumentation are described. In one embodiment, for example, an apparatus may include at least one memory comprising instructions and a processor coupled to the at least one memory. The processor may execute the instructions to implement a profiling process to profile a graphics processing unit (GPU) application being executed via a GPU, the profiling process to perform an instrumentation phase to determine an operating process being executed via the GPU and to generate instrumented binary code for the operating process, perform an execution phase to collect profiling data for a command of the operating process, and perform a completion phase for a profiling application executed via the processor to read the profiling data. Other embodiments are described.

Techniques for graphics processing unit profiling using binary instrumentation

Systems, methods, computer program products, and apparatuses to determine a count of trace records to be generated by each block of a plurality of blocks of an instrumented binary code to be executed on a graphics processor, each trace record to comprise a trace record type, the trace record types of a plurality of trace record types, determine a respective execution count for each of the plurality of blocks of the instrumented binary code to be executed on the graphics processor, and determine a respective size of each of a plurality of trace buffers to be allocated in memory based on the determined counts of trace records generated by each block and the execution count for each block, each trace buffer to store trace records of a respective one of the plurality of trace record types.

Generating different traces for graphics processor code

Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes an entry point detector to detect a first entry point address and a second entry point address of an original GPU kernel, the first entry point address including a first entry point instruction, the second entry point address including a second entry point instruction. An instruction inserter is to create a corresponding instrumented GPU kernel from the original GPU kernel by inserting first profiling initialization instructions at a first address of the instrumented GPU kernel, the instruction inserter to insert profiling measurement instructions into the instrumented GPU kernel. An entry point adjuster is to adjust a list of entry points of the instrumented GPU kernel to replace the first entry point address with the first address and the second entry point address with the second address.

An embodiment of a semiconductor package apparatus may include technology to determine a size for a trace buffer based on instrumented code to be executed on a graphics processor, initialize the trace buffer in a shared memory based on the determined size, provide the instrumented code to the graphics processor to be executed, collect data in the trace buffer from the executed instrumented code, analyze the data collected in the trace buffer on a processor, and generate a trace of the instrumented code on the processor based on the analyzed data. Other embodiments are disclosed and claimed.

Growing community of inventors

Kiryat Byalik, Israel

Konstantin Levit-Gurevich