Motorola Corporation

Konstantin Berman

Michael Zarubinsky

Eliav Zipper

A signal generator ( ) receives an input clock signal (X ) at a first frequency (F ) and derives an output clock signal (Y) at a second frequency (F ). An arrangement ( ) using a first intermediate signal (Z) receives the input clock signal (X ) and provides a second intermediate signal (X ) by selectively providing transitions ( ) of the second intermediate signal (X ) at time intervals (T (n)) that are determined by a variable number (A&plus;P(n)) of periods (T ) of the first intermediate signal (Z). The second intermediate signal (X ) has a frequency (F ) that is in average (F&prime; ) higher than the first frequency (F ). A phase-looked loop (PLL) circuit ( ) locks at this average frequency (F&prime; ) and provides the output clock signal (Y).

Growing community of inventors

Haifa, Israel

Konstantin Berman