Vitelic Corporation

Kong-Yeu Han

James T Koo

In-Nan Wu

The present invention provides an extended memory capability without requiring a much faster cache memory. This is done by providing address latches on the same chip as the cache memory and providing the most significant address bit from the address latches to be combined with the output of appropriate interface logic. The result of this combination is provided as address control signal along a path to the memory which does not require as long an access time as the rest of the addresses.

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Cupertino, CA, United States of America

Kong-Yeu Han