Avago Technologies Ecbu IP (singapore) Pte. Ltd.

Lumentum Operations LLC

Xilinx, Inc.

Jds Uniphase Corporation

Intellectual Discovery Co., Ltd.

Kong Weng Lee

Kee Yean Ng

Vincent V Wong

Yew Cheong Kuan

Cheng Why Tan

Gin Ghee Tan

Jay A Skidmore

Kumar Nagarajan

An-Chun Tien

James Yonghong Guo

Jihua Du

Prasad Yalamanchili

Raman Srinivasan

Dong P Kim

S Gabriel R Dosdos

Yongfeng Guan

Slava Khassine

Gity Samadi

A device may include a lead-frame including a first electrode and a second electrode, a carrier, a set of optical devices mechanically and electrically connected to the first electrode, and a set of electrical connections that electrically connects the second electrode to the set of optical devices. The lead-frame and the carrier may be mechanically connected to each other via a set of interlocking structures associated with the lead-frame and the carrier. The lead-frame and the set of optical devices may have matching coefficients of thermal expansion. The first electrode and the second electrode may be electrically isolated from each other.

Emitter-on-sub-mount device

A chip-scale package for an edge-emitting semiconductor device and a semiconductor device assembly including such a chip-scale package are provided. The chip-scale package includes an edge-emitting semiconductor device chip, a top submount disposed on a top surface of the chip, and a bottom submount disposed on a bottom surface of the chip. The top-submount area and the bottom-submount area are each greater than the chip area and less than or equal to about 1.2 times the chip area.

Chip-scale package and semiconductor device assembly

A leadframe-type packaged laser diode is provided, in which the laser diode chip is electrically decoupled from the package. A leadframe-type package including a two-dimensional grid of electrodes encapsulated in a molded plastic framework allows batch processing of one- or two-dimensional arrays of leadframes, the batch processing including laser diode chips attachment, wirebonding, and packaging, with subsequent breakout of individual packaged laser diodes from the one- or two-dimensional array.

Packaged laser diode and method of packaging a laser diode

A semiconductor device includes a light emitting semiconductor die mounted on at least one of first and second electrically conductive bonding pads, which are located on a first major surface of a substrate of the device. The light emitting semiconductor die has an anode and a cathode, which are electrically connected to the first and second electrically conductive bonding pads. The semiconductor device further includes first and second electrically conductive connecting pads, which are located on a second major surface of the substrate. The first and second electrically conductive bonding pads are electrically connected to the first and second electrically conductive connecting pads via first and second electrically conductive edge interconnecting elements.

Semiconductor device with a light emitting semiconductor die

The present invention relates to the packaging of high power laser(s) in a surface mount technology (SMT) configuration at low-cost using wafer-scale processing. A reflective sidewall is used to redirect the output emission from edge-emitting lasers through an optical element (e.g., a diffuser, lens, etc.). A common electrical pad centered inside the package provides p-side connection to multiple laser diodes (i.e. for power scalability). Thick plating (e.g. 75 um to 125 um) with a heat and electrically conductive material, e.g. copper, on a raised bonding area of a substrate provides good heat dissipation and spreading to the substrate layer during operation. The composite CTE of the substrate layer, e.g. AlN, and the heat/electrical conductive plating, e.g. Cu, substantially matches well with the laser substrates, e.g. GaAs-based, without the requirement for an additional submount.

High power surface mount technology package for side emitting laser diode

An integrated circuit package assembly includes a substrate, a semiconductor die having opposing first and second surfaces, and a head-spreader. The semiconductor die is mounted on the substrate with the first surface facing the substrate. The heat-spreader includes a central region thermally coupled to the second surface of the semiconductor die, a flange region mounted on the substrate, and a side wall region between the central and flange regions. A cavity is formed between the heat-spreader, the substrate, and the semiconductor die. The heat-spreader has at least one vent extending from the cavity through the heat-spreader.

Integrated circuit assembly having vented heat-spreader

A semiconductor device includes a light emitting semiconductor die mounted on at least one of first and second electrically conductive bonding pads, which are located on a first major surface of a substrate of the device. The light emitting semiconductor die has an anode and a cathode, which are electrically connected to the first and second electrically conductive bonding pads. The semiconductor device further includes first and second electrically conductive connecting pads, which are located on a second major surface of the substrate. The first and second electrically conductive bonding pads are electrically connected to the first and second electrically conductive connecting pads via first and second electrically conductive interconnecting elements.

A substantially planar substrate having opposed major surfaces is provided. The substrate includes a through hole that extends between the major surfaces. The through hole is filled with a conductive interconnecting element. A conductive mounting pad and a conductive connecting pad are formed on different ones of the major surfaces in electrical contact with the conductive interconnecting element. The packaging device formed by the method has a volume that is only a few times that of the semiconductor die and can be fabricated from materials that can withstand high-temperature die attach processes. The packaging device can be configured as the only packaging device used in the semiconductor device or as a submount for a semiconductor die that requires a high-temperature die attach process.

Method for fabricating a packaging device for semiconductor die and semiconductor device incorporating same

The packaging device includes a substrate, a mounting pad, a connecting pad and an interconnecting element. The substrate is substantially planar and has opposed major surfaces. The mounting pad is conductive and is located on one of the major surfaces. The connecting pad is conductive and is located on the other of the major surfaces. The conductive interconnecting element extends through the substrate and electrically interconnects the mounting pad and the connecting pad. The packaging device has a volume that is only a few times that of the semiconductor die and can be fabricated from materials that can withstand high-temperature die attach processes. The packaging device can be configured as the only packaging device used in the semiconductor device or as a submount for a semiconductor die that requires a high-temperature die attach process.

Growing community of inventors

San Jose, CA, United States of America

Kong Weng Lee