Imec

Imec Vzw

Komalan Manu Perumkunnil

Francky Catthoor

Stefan Cosemans

Praveen Raghavan

Jose Ignacio Gomez

Matthias Hartmann

Christian Tenllado

A microcomputer comprising a microprocessor unit and a first memory unit is disclosed. In one aspect, the microprocessor unit comprises at least one functional unit and at least one register. Further, the at least one register is a wide register comprising a plurality of second memory units which are capable to each contain one word, the wide register being adapted so that the second memory units are simultaneously accessible by the first memory unit, and at least part of the second memory units are separately accessible by the at least one functional unit. Further, the first memory unit is an embedded non-volatile memory unit.

Method and device to reduce leakage and dynamic energy consumption in high-speed memories

The present disclosure relates to low-layer memory for a computing platform. An example embodiment includes a memory hierarchy being directly connectable to a processor. The memory hierarchy includes at least a level, referred to as L, memory structure comprising a non-volatile memory unit as Ldata memory and a buffer structure (L-VWB). The buffer structure includes a plurality of interconnected wide registers with an asymmetric organization, wider towards the non-volatile memory unit than towards a data path connectable to the processor. The buffer structure and the non-volatile memory unit are arranged for being directly connectable to a processor so that data words can be read directly from either of the Ldata memory and the buffer structure (L-VWB) by the processor.

Low-layer memory for a computing platform

Growing community of inventors

Kidangannur, Belgium

Komalan Manu Perumkunnil