Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kioxia Corporation

Koki Ueno

Yasuhiro Shiino

Eietsu Takahashi

Toshitake Yaegashi

Yasuhiro Shimura

Hiroyuki Nagashima

Shigefumi Irieda

Hidehiro Shiga

Keisuke Yonehama

Tomoki Higashi

Yuki Kanamori

Shinichi Oosera

Junichi Kijima

Sumito Ohtsuki

Manabu Sakaniwa

Asuka Kaneda

Toshiaki Edahiro

Takeshi Nakano

Norihisa Arai

Akira Shimizu

Masahiro Noguchi

Go Shikata

Kenri Nakai

Yuzuru Shibazaki

Mayumi Yamamoto

A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.

Nonvolatile semiconductor memory device including a memory cell array and a control circuit applying a reading voltage

According to one embodiment, a memory controller transmits a first instruction to a memory device. The memory device includes cell transistors; word lines coupled to gates of the cell transistors; a first data latch; and a second latch. The first instruction instructs application of a positive voltage to one of the word lines. The memory controller transmits a second instruction after the transmission of the first instruction and before transmitting a third instruction. The third instruction instructs output of data from the memory device. The second instruction is different from the third instruction and a fourth instruction instructing copy of data from the first data latch to the second data latch.

Memory device and memory controller

A semiconductor memory device includes first and second memory transistors and first and second word lines connected to gate electrodes of the memory transistors. The semiconductor memory device is configured such that a first write operation to the first memory transistor, a second write operation to the second memory transistor, a third write operation to the first memory transistor, and a fourth write operation to the second memory transistor are executed in this order. In the first and second write operations, data write is performed using only a program operation. In the third and fourth write operations, data write is performed using the program operation and the verify operation.

Semiconductor memory device

Electrically-rewritable nonvolatile semiconductor memory device

A memory device includes a plurality of memory cell transistors, a word line electrically connected to gates of the memory cell transistors, and a control circuit configured to perform programming of the memory cell transistors to a plurality of different threshold voltage ranges in a plurality of loops, each loop including a program operation and a program verification. The different threshold voltage ranges include a first threshold voltage range and a second threshold voltage range that is at a higher voltage than the first threshold voltage range. Further, during the program operation, the control circuit applies a program voltage to the word line, the program voltage increasing for each subsequent loop, an amount of increase of the program voltage when programming to the second threshold voltage range being set in accordance with a number of loops required to complete programming to the first threshold voltage range.

Memory device and a method for programming memory cell transistors

Nonvolatile semiconductor memory device

Memory device

Nonvolatile semiconductor memory device having a control circuit that controls voltage applied to non-selected word lines connected to unselected memory cells

Nonvolatile semiconductor memory device with first and second read operations with different read voltages

Growing community of inventors

Yokohama, Japan

Koki Ueno