Other

Mitsubishi Electric Corporation

Kuraray Co., Ltd.

Kojiro Hara

Hiroyuki Nohira

Tatsuro Watahiki

Tatsuhiko Hayashibara

Kensuke Nagashima

Atsufumi Inoue

Kengo Matsufuji

An object is to provide a semiconductor device that can prevent organic contamination of an electrode including a plurality of laminated metal layers. A semiconductor device includes: a semiconductor substrate; and an electrode including a plurality of layers laminated on a principal surface of the semiconductor substrate. The electrode includes: a first metal layer in contact with the principal surface of the semiconductor substrate, the first metal layer containing Al; an oxide layer formed on a surface of the first metal layer, the oxide layer containing a metal and oxygen; and a second metal layer formed on a surface of the oxide layer. Concentrations of the oxygen in the oxide layer are higher than or equal to 8.0&#xd7;10/cmand lower than or equal to 4.0&#xd7;10/cm.

Semiconductor device and method for manufacturing semiconductor device

In optical resolution of an optically inactive (.+-.)-cis-4-aminocyclopent-2-en-1-carboxylic acid derivative into its (+)-derivative and (-)-derivative, the (.+-.)-cis-4-aminocyclopent-2-en-l-carboxylic acid derivative is allowed to react with an optically active cis-2-(arylalkylamino)cyclohexanemethanol or optically active .alpha.-alkylbenzylamine serving as an optically resolving agent, to form diastereomer salts corresponding to the (+)-cis-4-aminocyclopent-2-en-1-carboxylic acid derivative and the (-)-cis-4-aminocyclopent-2-en-1-carboxylic acid derivative.

Process for optical resolution of

A digital signal time difference correcting circuit used in digital interface circuits for transmitting and receiving a plurality of digital signals. Prior art digital interface circuits in typical tape recorders process signals on two channels using a single cable. Where the number of channels increases to more than two, a plurality of cables need to be used correspondingly. If the cables are different in length or if any cable has a data processing circuit or the like therein, the signals on the cables are out of phase with one another and cannot be processed. The circuit according to the invention comprises a plurality of pairs of storage means relative to a plurality of input signals and a control means. The control means writes each of the digital input signals to either of two storage means constituting each pair thereof. The control means reads data simultaneously from both storage means constituting each storage means pair in accordance with the clock timing of either of the input signals stored therein. This scheme eliminates the time difference of the multiple digital input signals.

Digital signal time difference correcting circuit

A PWM signal demodulation method measuring the leading edge period of a modulated signal and a time between adjoining leading and trailing edges of the signal and finding the modulation factor in terms of the ratio of the period to the time. Reliable demodulation is ensured even if the carrier frequency of the modulated signal varies significantly. This novel method eliminates one disadvantage of the prior art demodulation method encountered when a varying carrier frequency exceeds the linearity domain of an integrator in its integrating characteristic, causing unreliable demodulation.

Growing community of inventors

Tokyo, Japan

Kojiro Hara