Panasonic Intellectual Property Management Co., Ltd.

Koji Tamura

Shogo Okita

Atsushi Harikai

Noriyuki Matsubara

Akihiro Itou

Hiroshi Benno

Disclosed is a dicing system including a protection layer forming apparatus, a patterning apparatus, a plasma treatment apparatus, a measuring apparatus that obtains at least of first processing data relating to a protection layer, second processing data relating to a mask, and third processing data relating to element chips, and a control unit that operates at least one of the protection layer forming apparatus, the patterning apparatus, and the plasma treatment apparatus on a recipe that is defined for each of the apparatuses. The control unit determines, based on at least one of the first processing data, whether or not to modify the recipe, the second processing data, and the third processing data, modifies the at least one of the recipes if the recipe needs to be modified, and operates at least one of the protection layer forming apparatus, the patterning apparatus, and the plasma treatment apparatus based on the modified recipe.

Dicing system and dicing method

A method of manufacturing a semiconductor chip includes: preparing a semiconductor wafer; forming a mask on a front surface of the semiconductor wafer so as to cover each of the element regions and to expose the dividing region; exposing the front surface to plasma in a state where a back surface of the semiconductor wafer is held with a dicing tape to dice the semiconductor wafer into a plurality of semiconductor chips by etching the dividing region exposed from the mask up to the back surface while protecting each of the element regions with the mask from plasma; and removing the mask from the front surface together with an adhesive tape by peeling off the adhesive tape after sticking the adhesive tape to the side of the front surface.

Growing community of inventors

Osaka, Japan

Koji Tamura