Fujitsu Corporation

Fujitsu Semiconductor Limited

Koji Takekawa

Koju Aoki

Takahiro Watai

Masaya Mizutani

Takehito Doi

Hiroyuki Sakima

Katsuya Shimizu

Masafumi Kondou

Masahiro Tsukahara

Takuya Okajima

A charge and discharge signal circuit includes: high side transistors connected in series; low side transistors connected in series; high side drive circuits; low side drive circuits; and a drive signal generation circuit, wherein each drive circuit includes: a high side level shifter; a high side capacitor switch string of a capacitor and a switch element connected in series, being connected in parallel with the high side transistor; and a high side drive part, to which an output of the high side level shifter is supplied, and each of the low side drive circuits includes: a low side level shifter; a low side capacitor switch string of a capacitor and a switch element connected in series, being connected in parallel with the low side transistor; and a low side drive part, to which an output of the low side level shifter is supplied.

Charge and discharge signal circuit and DC-DC converter

An amplification circuit connected with a lowpass filter, which reduces the time required for compensating the amplification characteristic and starting up at turning on the power supply, and a control method thereof are provided. An amplification circuit, which operates in any one of the operation mode of ordinary operation mode MDN and special operation mode MDT, includes an amplifying section, a lowpass filterconnected to the amplifying section, and a lowpass filter setting sectionthat sets a cut-off frequency fc. In the case of an ordinary operation mode MDN, the cut-off frequency is set to an ordinary cut-off frequency fcn in which error in the output signal does not exceed an output allowable error as an allowable error, and in the case other than that, set to the side higher than the ordinary cut-off frequency fcn.

Amplification circuit and control method of amplification circuit

An amplifier circuit which is connected to a sensor and variably sets an amplification property and a control method thereof are disclosed, the circuit having the capability of restricting the influence of change with time and temperature change. The amplifier circuit, which receives, as an input, a detection signal from the sensor and variably sets an amplification property, comprises: (1) a first reference value retaining unitfor retaining a first reference value Kfor setting an amplification property which makes an output signal be a specified detection reference output voltage when a reference input condition KJ is detected; (2) a correction signal generation unitfor generating a correction signal HS which reduces the difference between an amplification property actual measurement value and an amplification property set value; and (3) a first amplification property correction unitfor correcting the first reference value Kbased on the correction signal HS.

Amplifier circuit and control method thereof

This invention provides a comparator circuit which outputs a stable waveform without oscillation even if a gradient of a change of a comparison input signal is small and determines a magnitude of the comparison input signal within a predetermined threshold value regardless of the increase/decrease direction of the comparison input signal. A comparator circuitcomprises a capacitative elementwhich is charged or discharged corresponding to a difference of potential between a comparison input signal IN and a reference input signal REF, an analog buffer portionwhich outputs high level if the voltage is above a threshold voltage Vth and low level if it is less than the threshold voltage Vth, an edge detecting portionwhich detects leading and trailing edges of the analog buffer portionso as to output an up signal UP and a down signal DOWN and a charge pump portionwhich charges a capacitative portion corresponding to the up signal UP and discharges the capacitative portion corresponding to the down signal DOWN.

Comparator circuit and control method thereof

Provided are two monitor circuits for monitoring two input signals of an input stage differential amplifier, respectively, and two monitor circuit for monitoring two output signals of the input stage differential amplifier, respectively. When failure occurs at the bridge circuit of a sensor element or at the input stage differential amplifier, the monitoring units or the monitoring units detect abnormality, which makes it possible to detect the failure of the sensor element or the input stage differential amplifier. Therefore it is possible to detect failure such as a disconnection or a short circuit of the bridge circuit of the sensor element and failure which has occurred at the amplifier for amplifying outputs of the sensor element.

Sensor detection apparatus and sensor

A circuit for detecting a difference in capacitance between a first capacitor and a second capacitor provided in a sensor includes an oscillator configured to generate an oscillating signal, a phase comparator coupled to the oscillator to output a signal responsive to a phase difference between the oscillating signal delayed by the first capacitor and the oscillating signal delayed by the second capacitor, an integration circuit coupled to the phase comparator to output an integrated signal made by integrating the signal responsive to the phase difference over a time period equal to a predetermined number of cycles of the oscillating signal, and a sample-and-hold circuit coupled to the integration circuit to output a signal made by sampling and holding the integrated signal at substantially an end of the time period.

Circuit for detecting difference in capacitance

A reset circuit for a PLL frequency synthesizer allows the PLL to quickly generate an output signal after waking up from a power-save mode. The reset circuit includes a delay circuit for receiving a shift signal and generating the output signal by delaying the shift signal for a predetermined time. A determination signal receives the shift signal and the output signal, determines whether they match, and generates a reset signal from the predetermined time when the shift signal is being shifted. A control circuit receives a power-save signal, which deactivates the PLL, and provides the delay circuit with a control signal for matching the output signal with the shift signal when the power-save signal is cancelled.

Reset circuit and pll frequency synthesizer

A prescaler having a frequency division shifting circuit for shifting a frequency division ratio in response to a frequency division ratio shifting signal, and dividing an input signal in accordance with the shifted frequency division ratio to generate a first divisional signal. The prescaler also includes an extender circuit connected to a frequency division shifting circuit for dividing the frequency of the first divisional signal with a predetermined frequency division ratio to generate a second divisional signal. The extender circuit contains a synchronous counter.

Prescaler and PLL circuit

A modulation mixer includes a low cost circuit for reducing a carrier frequency leak. An orthogonal modulator including the modulation mixer may be formed on a single silicon substrate and does not need to be connected to an external transformer to suppress carrier frequency leak.

Growing community of inventors

Kasugai, Japan

Koji Takekawa