Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Koji Shimoyama

Keiichi Nakao

Yukihiro Shimasaki

Nobuya Matsutani

Atsushi Iwase

Suzushi Kimura

Yuji Mido

Michio Ohba

Naotugu Yoneda

Kojiro Okuyama

Toshiyuki Asahi

Koichi Kugimiya

Hitoshi Ishimoto

Yuichi Takahashi

Syunichiro Kawashima

Hidenori Uematsu

Akihiko Ibata

Mikio Taoka

Yoshihisa Takase

Shinichi Morimoto

Mitio Ohba

A base layer is formed on the surface of metal plate, metal pipe, unbaked ceramic sheet, laminated ceramic green sheet, etc., the base layer causing a gelling reaction with inkjet-ink. The base layer improves ink acceptability for low viscosity inks such as inkjet-ink, and prevents oozing, draining, uneven thickness of an ink pattern and a resist pattern. Thus, the present invention enables to use an ink jet process for providing resist patterns for etching, etc., which has to fulfill stringent high precision requirements.

Combination of base layer and ink for inkjet for manufacturing electronic component

A thermally conductive composition is made to contain a cured thermosetting resin containing a crystalline epoxy resin component, and an inorganic filler. The content by percentage of the inorganic filler in the thermally conductive composition is 66% or more and 90% or less by volume. This thermally conductive composition has a main portion made mainly of the inorganic filler, and a surface layer portion made mainly of the crystalline epoxy component and formed on the main portion to be continuous to the main portion.

Thermoconductive composition, heat dissipating plate, heat dissipating substrate and circuit module using thermoconductive composition, and process for production of thermoconductive composition

The present invention provides a chip part manufacturing method comprising a separating process capable of suppressing deformation of chip parts, and also provides chip parts. It comprises a step of forming a plurality of frame-like void portions () in one main surface of substrate () and insulating resin layer () having a spiral void portion () disposed in the region thereof, a step of forming metal layer () in frame-like void portion () and spiral void portion () and on insulating resin layer (), a step of polishing metal layer () at least up to the upper surface of insulating resin layer and forming coil section () in spiral void portion (), and a step of forming a metal layer for connecting chip parts to frame-like void portion (), wherein the metal layer is melted and removed by using an etching agent to separate a plurality of chip parts connected to each other by a frame-like connection.

Chip part manufacturing method and chip parts

In an inductance component, a stress is not locally applied even in the condition where heat is applied to entire component, such as when implementing soldering, so that high reliability is realized. For realizing this, the component includes an element, a coil formed in the element, terminals electrically connected to the coil, and magnetic layers arranged so as to be substantially parallel to a winding surface of the coil are formed in the element and the entirety of the magnetic layers is covered with a material of which thermal expansion and contraction rate is uniform.

Inductance component

Method of manufacturing base layer, ink for inkjet and electronic components

Base layer for manufacturing an electronic component by an etching process

A coil electric conductor has an insulating substrate, a first conductive layer, and a second conductive layer. The first conductive layer is formed at a depression provided on a face of the insulating substrate. The second conductive layer is formed on the first conductive layer with the first conductive layer interposed between the second conductive layer and the insulating substrate. This construction realizes a coil electric conductor having a highly precisely uniformized cross-sectional shape.

Coil electric conductor, laminated coil conductor, production method of the same and electronic component using the same

A capacitor element includes a valve metal foil including a core layer and a porous layer on the core layer, a dielectric layer on a portion of the valve metal foil excluding an end portion of the valve metal foil, a solid electrolyte layer on the dielectric layer, a collector layer on the solid electrolyte layer, and a zinc layer on the end portion of the valve metal foil. A solid electrolytic capacitor includes the capacitor element, an insulating case for sealing the capacitor element as to expose the zinc layer, a nickel layer on the zinc layer, and an electrode provided on the case and electrically connected to the collector layer. The solid electrolytic capacitor has a small impedance even at high frequencies, and has a small overall size and a large capacitance.

Solid electrolytic capacitor and method of manufacturing the same

An electrode of an electronic device includes plural nickel layers adjacent to each other, and an outer nickel layer contains less phosphorus than an inner nickel layer. The electrode has an increased solder joining strength without having a flexural strength decreased.

Electronic device

The invention relates to a chip resistor which is used as a circuit part for various electric apparatuses. The object of the invention is to realize a low resistance and a low TCR, and also high accuracy and high reliability. In order to achieve the object, a chip resistor is configured so as to have: a substrate; a resistance layer which is formed on at least one face of the substrate and which is made of a copper nickel alloy; upper-face electrode layers which make surface contact with the upper faces of both the end portions of the resistance layer; and end-face electrodes which are formed so as to cover the upper-face electrode layers. Since the bonding between the resistance layer and the upper-face electrode layers is conducted by metal-to-metal bonding, particularly, impurities which may affect the Properties do not exist in the interface. As a result, it is possible to realize a chip resistor which is excellent in heat resistance, and which has a low resistance and a low TCR.

Method of producing a chip resistor

The invention relates to a chip resistor which is used as a circuit part for various electric apparatuses. The object of the invention is to realize a low resistance and a low TCR, and also high accuracy and high reliability. In order to achieve the object, a chip resistor is configured so as to have: a substrate; a resistance layer which is formed on at least one face of the substrate and which is made of a copper nickel alloy; upper-face electrode layers which make surface contact with the upper faces of both the end portions of the resistance layer; and end-face electrodes which are formed so as to cover the upper-face electrode layers. Since the bonding between the resistance layer and the upper-face electrode layers is conducted by metal-to-metal bonding, particularly, impurities which may affect the properties do not exist in the interface. As a result, it is possible to realize a chip resistor which is excellent in heat resistance, and which has a low resistance and a low TCR.

Chip resistor

The present invention provides dielectric ceramics with less variation of temperature coefficient at a resonant frequency due to heating history during the sintering of ZrTiO.sub.4 and ZrO.sub.2 --SnO.sub.2 --TiO.sub.2 ceramics, and having a high unloaded Q value and a high dielectric constant, and a temperature coefficient at a resonant frequency which is widely variable as desired, and dielectric resonators using the dielectric ceramics which have a high unloaded Q value and a strong electrode layer. The main components of the dielectric ceramics may be expressed by the formula: xZrO.sub.2 --yTiO.sub.2 --zA.sub.(1+u)/3 B.sub.(2-u)/3 O.sub.2 wherein A denotes at least one component selected from the group (A) consisting of Mg, Co, Zn, Ni and Mn, B denotes at least one component selected from the group (B) consisting of Nb and Ta, and x, y, z and u (x, y and z are molar fractions and u is a value within the range from 0 to 1.90) have the relation of x+y+z=1.0, 0.10.ltoreq.x.ltoreq.0.60, 0.20.ltoreq.y.ltoreq.0.60, 0.01.ltoreq.z.ltoreq.0.70. The main component may include, as accessory components, at least one component selected from the group (C) consisting of Ba, Sr, Ca, Cu, Bi and W at 0.005 to 7.000% by weight of the entire weight of the ceramic.

Growing community of inventors

Hyogo, Japan

Koji Shimoyama