Sumitomo Electric Industries, Limited

Koji Nishizuka

Takashi Kyono

Kei Fujii

Katsushi Akita

Kaoru Shibata

Takamichi Sumitomo

Yusuke Yoshizumi

Yohei Enya

Takashi Ishizuka

Susumu Yoshimoto

Suguru Arikata

Toshiyuki Tanahashi

A vertical cavity surface emitting laser includes: a supporting base having a principal surface including III-V compound semiconductor containing gallium and arsenic as constituent elements; and a post disposed on the principal surface. The post has a lower spacer region including a III-V compound semiconductor containing gallium and arsenic as group-III elements, and an active layer having a quantum well structure disposed on the lower spacer region. The quantum well structure has a concentration of carbon in a range of 2&#xd7;10cmor more to 5&#xd7;10cmor less. The quantum well structure includes a well layer and a barrier layer. The well layer includes a III-V compound semiconductor containing indium as a group-III element, and the barrier layer includes a III-V compound semiconductor containing indium and aluminum as group-III elements. The lower spacer region is disposed between the supporting base and the active layer.

Vertical cavity surface emitting laser, method for fabricating vertical cavity surface emitting laser

A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d, the compound semiconductor forming the buffer layer has a lattice constant d, and the compound semiconductors forming the quantum well layer have an average lattice constant d, (d&#x2212;d)/dis &#x2212;3&#xd7;10or more and 3&#xd7;10or less, and (d&#x2212;d)/dis &#x2212;3&#xd7;10or more and 3&#xd7;10or less.

Semiconductor layered structure, method for producing semiconductor layered structure, and method for producing semiconductor device

An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5&#xd7;10cm.

Epitaxial wafer and method for manufacturing same

A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 &#x3bc;m and less than or equal to 8 &#x3bc;m, the semiconductor device having a dark current density of less than or equal to 1&#xd7;10A/cmwhen a reverse bias voltage of 60 mV is applied at a temperature of &#x2212;140&#xb0; C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.

Semiconductor device

Provided is a Group III nitride semiconductor device, which comprises an electrically conductive substrate including a primary surface comprised of a first gallium nitride based semiconductor, and a Group III nitride semiconductor region including a first p-type gallium nitride based semiconductor layer and provided on the primary surface. The primary surface of the substrate is inclined at an angle in the range of not less than 50 degrees, and less than 130 degrees from a plane perpendicular to a reference axis extending along the c-axis of the first gallium nitride based semiconductor, an oxygen concentration Noxg of the first p-type gallium nitride based semiconductor layer is not more than 5&#xd7;10cm, and a ratio (Noxg/Npd) of the oxygen concentration Noxg to a p-type dopant concentration Npd of the first p-type gallium nitride based semiconductor layer is not more than 1/10.

Growing community of inventors

Itami, Japan

Koji Nishizuka