Nec Corporation

Other

Tokyo Ohka Kogyo Co., Ltd.

Mitsubishi Heavy Industries Limited

Nitto-denko Corporation

Toppan Printing Co., Ltd.

Koji Matsui

Tadanori Shimoto

Katsumi Kikuchi

Takuo Funaya

Kazuhiro Baba

Yoshitsugu Funada

Kazuaki Utsumi

Akinobu Shibuya

Masahiro Kubo

Hiroshi Komano

Sakae Kitajo

Naoji Senba

Kazumasa Igarashi

Ichiro Hazeyama

Toshimi Aoyama

Mitsuru Kimura

Eiichi Ogawa

Yuzo Shimada

Hiroshi Noro

Takero Teramoto

Osamu Myohga

Tomoaki Kitagawa

Hironobu Kawasato

Shin Kataoka

Yoshiyuki Mizuguchi

Yuko Masunaga

Naoya Kawamura

Naomichi Mimita

Manabu Kasano

Hiroyuki Isu

Aki Nakayama

Yu Kokubo

Satoko Takahashi

Tsuyoshi Nakaji

A personal identification medium is provided that includes a decorative layer provided with an antenna, and a laser marking layer in which a personal information marking portion is marked on the decorative layer, where the antenna includes a non-decorative portion and a decorative portion connected to the non-decorative portion, and the personal information marking portion formed on the laser marking layer overlaps at least a portion of the decorative portion formed on the decorative layer.

Personal identification medium

An apparatus for updating an operation plan of a high-temperature component based on operation performance. The apparatus includes: a display unit which displays an operation plan of multiple high-temperature components which are mounted upon a device; a storage unit which stores, for each device, at least initial setting data including information regarding operation start times of the high-temperature components and scheduled times for carrying out periodic inspections of the high-temperature components; an operation plan creation unit which, using the initial setting data, generates data of the operation plan including operation intervals of the high-temperature components from the operation start times to the scheduled times for carrying out the periodic inspections, and stores same in the storage unit for each device; and an operation plan update unit which updates the operation plan data which is displayed on the display unit, based on the high-temperature component operation performance information.

Operation plan creation device, operation plan creation method, and operation plan creation program

An Sn&#x2014;Zn alloy solder having a composition comprising 7 to 10 mass % of Zn, 0.075 to 1 mass % of Ag, and 0.07 to 0.5 mass % of Al; further comprising one or two components selected from 0.01 to 6 mass % of Bi and 0.007 to 0.1 mass % of Cu; and optionally comprising 0.007 to 0.1 mass %, with the balance being Sn and unavoidable impurities. The solder has the same processability, service conditions, and connection reliability as conventional Sn-37 mass % Pb eutectic solder, and does not contain the biologically harmful lead.

Solder, and mounted components using the same

A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

Semiconductor package board using a metal base

An object of the present invention is to provide an electronic part device which can be repaired even in the case of an electronic part device having a malfunction in electrical connection after carrying out underfill. The present invention is an electronic part device in which a semiconductor element (flip chip) () is mounted on a wiring circuit substrate () under such a state that an electrode part for connection (joint ball) disposed on the semiconductor element (flip chip) () and a circuit electrode () disposed on the wiring circuit substrate () are facing with each other. In addition, the gap between the wiring circuit substrate () and the semiconductor element (flip chip) () is filled by a filling resin layer () comprising a liquid epoxy resin composition which comprises the following component (D) and the following components (A) to (C).

Electronic component unit

An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.

Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device

An electronic device assembly for dense mounting of electronic devices and method of connecting the electronic devices are disclosed. Conductive portions implemented by metal bumps and sealing portions implemented by adhesive seal resin are connected by thermocompression at the same time between two electronic devices. This may be repeated between three or more electronic device.

Electronic device assembly and a method of connecting electronic devices constituting the same

An electronic component is described, which contains a printed circuit board having electrodes for connection and a semiconductor chip having electrodes for connection which is mounted on said circuit board with their electrodes facing those of the circuit board, the gap between the circuit board and the semiconductor chip being filled with a sealing resin layer, wherein the sealing resin layer is formed of a liquid epoxy resin composition containing (A) a liquid epoxy resin, (B) a curing agent, (C) an inorganic filler, and (D) an N,N,N&prime;,N&prime;-tetrasubstituted fluorine-containing aromatic diamine derivative.

Electronic component

A supporting substrate for mounting a semiconductor bare chip thereon has a surface provided with electrode pads thereon and bumps on the electrode pads. A sealing resin film is selectivley formed on the periphery of the surface of the supporting substrate, except over the bumps, and further the sealing resin film has at least a thermosetting property. The electrode pads of the supporting substrate and the bumps of the semiconductor bare chip are bonded by a thermo-compression bonding.

Supporting substrate for a semiconductor bare chip

There is provided a thin film resistor formed of titanium nitride containing oxygen in a solid solution condition.

Thin film resistor and method for forming the same

A method of making a multilayer buildup printed circuit board and mounting substrate wherein a resin laminated wiring sheet, which has a copper foil, an epoxy-acrylate photosensitive resin composition having a fluorene structure, and a conductive pattern, are overlaid on the conductive pattern side of a supporting substrate at 100&deg; C. and 3 kg/cm , and adhered thereto at 200 to 300&deg; C. and 10 kg/cm . The copper foil is entirely etched by wet-etching or is etched into a predetermined pattern so as to form a wiring structure. Since the epoxy-acrylate photosensitive resin composition is not treated at 100&deg; C. or more, and hence is in a semi-cured state, the epoxy-acrylate photosensitive resin composition can be heat-bonded onto the supporting substrate.

Resin laminated wiring sheet, wiring structure using the same, and production method thereof

Growing community of inventors

Tokyo, Japan

Koji Matsui