Kabushiki Kaisha Toshiba

Fujitsu Corporation

Nec Electronics Corporation

Fujitsu Isotec Limited

Fujitsu Kiden, Ltd.

Koji Kimura

Yuichi Nakashima

Hiroshi Kawamoto

Hiroshi Naruse

Shin-ichi Taka

Kenichi Yamazaki

Yasuo Sasaki

Mitsuharu Ishii

Toshiyuki Kobayashi

Dai Murayama

Hideki Zenitani

Yoshiyuki Shioyama

Toshimitsu Kumazawa

Kenji Mitsumoto

Kanako Komatsu

Yuuichi Hanada

Makoto Tsuchida

Masahiko Murai

Nagako Hisada

Jun Morioka

Tsubasa Yamada

Masako Hori

Hirofumi Kawai

Shingo Tamaru

Susumu Iida

Yoshihiro Ueda

Tomohiro Asazuma

Hiroyuki Miyakawa

Rintarou Okamoto

Thomas Edward Keen

Youheita Toriyama

Misuaki Kumagai

Yasushi Kasao

Masako Fukaya

Takeshi Ichimaru

Yukihiko Oashi

Koichi Shimozato

Takao Nosaka

Saori Machida

Ikuro Komamura

According to an embodiment, a thermal load estimating device receives actual power consumption of various types of devices installed in a room, a thermal load pattern of a time-series maximum thermal load of the room, and power consumption of the various types of devices in the room; estimates a thermal load of the room at appropriate time based on the actual power consumption, the thermal load pattern, and the power consumption; and outputs an estimated thermal-load value as a result of estimation.

Thermal load estimating device and air conditioning control system

A load control apparatus and a load control system capable of more efficiently using power generated from a private power generator, in which a load control apparatus includes a memory, a selector, and a load controller. The memory is configured to store a plurality of patterns having a plurality of control operations that are prioritized for a plurality of loads operated by consuming electric power. The selector is configured to select one of the patterns stored in the memory. The load controller is configured to operate the loads in order of priority on the basis of the control operation of the selected pattern while a total sum of power consumed by the loads does not exceed a target power value representing a value based on power suppliable by the electric generator.

Load control apparatus and load control system

According to one embodiment, a thermal recycling plant system includes a cooler cools coolant recycling thermal from coolant circulating in a load apparatus and which consumes energy while operating and a controller controls the cooler. The controller includes a calculator and a monitor. The calculator calculates an optimal temperature optimal for the coolant by optimization calculation for minimizing energy consumption under given conditions. The monitor monitors an operating state of the load apparatus to determine whether an abnormality exists in the load apparatus. The monitor controls the cooler to cool the coolant to a temperature lower than the optimal temperature calculated, on determining that an abnormality exists in the load apparatus.

Thermal recycling plant system, apparatus for controlling a thermal recycling plant and method of controlling a thermal recycling plant

According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include simultaneously forming a first field insulating film and at least one second field insulating film on a front face side of a semiconductor layer. The at least one second field insulating film is separated from the first field insulating film and thinner than the first field insulating film. The method can include forming a drift region of a first conductivity type in a region of the semiconductor layer including the first field insulating film and the second field insulating film. The method can include forming a drain region of the first conductivity type in the front face of the semiconductor layer on a side of the first field insulating film. In addition, the method can include forming a source region of the first conductivity type in the front face of the semiconductor layer on a side of the second field insulating film.

Method for manufacturing semiconductor device and semiconductor device

An appliance control apparatus acquires, at intervals of predetermined time, a state data including values of operation states of respective appliances, stores the state data as one record in a memory, to store time-series records, classifies the records in the memory into a plurality of living situation groups by clustering the records, and calculates, for each living situation group, a barycenter of each operation state, determines, for a target state data, one of the living situation groups to which the target state data belongs, determines one of the operation states whose value in the target state data is larger than corresponding barycenter in the one of the living situation groups, and determines the barycenter as a recommended value, and controls the one of operation state to the recommended value when obtaining an acceptance instruction for the recommended value.

Appliance control apparatus and method

In a semiconductor device capable of adjusting an output impedance of a first output impedance adjustable output buffer of an external semiconductor device connectable to the semiconductor device, a second output impedance adjustable output buffer is provided. A comparator compares a first output voltage of a real load circuit including the first output impedance adjustable output buffer with a second output voltage of a replica load circuit including the second output impedance adjustable output buffer. An output impedance control circuit transmits an output signal of the comparator to the external semiconductor device to adjust the output impedance of the first output impedance adjustable output buffer, so that the first output voltage is made equal to the second output voltage.

Semiconductor device capable of adjusting output impedance of external semiconductor device and output impedance adjusting method

Portable printer

Bar code scanner

In a semiconductor device, a first conductive film made of, for example, polysilicon is formed on the element region of the semiconductor substrate. An insulation film is formed on the semiconductor substrate, for covering at least the first conductive film. A second conductive film covers at least the end portion of the insulation film. The first conductive film is used as a gate electrode of the MOS transistor, and the second conductive film is used as a protection film for covering and protecting the end portion of the insulation film and a lead-out electrode of the bipolar transistor. The end portion of the insulation film is covered and protected by the second conductive film obtained by patterning the conductive layer made of, for example, polysilicon. Further, the conductive layer is patterned so that stepped portions formed on the insulation film and the end portion of the insulation film are covered, and using this pattern, anisotropic etching is carried out. Thus, formation of residue on the side-wall of the second conductive film, on the stepped portions formed as covering the first conductive film, can be avoided. In a later step, the pattern of the second conductive film which covers the stepped portion is removed by etching.

Method of fabricating a semiconductor device comprising a MOS portion

The present invention provides a method of manufacturing a semiconductor device to prevent the generation of crystalline defects due to shorting between interconnects resulting from etch residue as a result of the generation of vertical bird's beaks on top of the trench during field oxidation layer formation. The method includes forming an epitaxial layer over a semiconductor substrate, depositing a first SiO.sub.2 layer, an SiN layer and a second SiO.sub.2 layer in that order upon said epitaxial layer and forming a trench from the second SiO.sub.2 layer extending into the semiconductor substrate. A third SiO.sub.2 layer is formed coating said trench with a region of said third Si0.sub.2 layer removed adjacent to said first SiO.sub.2 layer to expose a portion of said epitaxial layer within said trench. The trench is then filled with a first polysilicon layer to coat the third SiO.sub.2 layer and the first SiO.sub.2 layer followed by removal of the second SiO.sub.2 layer and the SiN layer and finally, the first SiO.sub.2 layer is oxidized to a depth extending into the trench corresponding to the exposed portion of the epitaxial layer so as to form a field oxide layer.

Method of manufacturing a semiconductor device

At the front side of a wafer cassette fitted to a wafer feeding unit of a magnetic levitation wafer conveying device, a wafer stopper for preventing the wafer waiting in the wafer cassette from popping out is provided. The wafer supplied from the magnetic levitation conveying device is supplied into the reaction chamber by magnetic force, and is directly held in the reaction chamber by this magnetic force. Since the wafer stopper is positioned between the wafer cassette fitted in the wafer feeding unit and the starting end of the wafer conveying route, the wafer waiting in the wafer cassette next to the wafer to be conveyed is prevented from popping out together with the wafer to be conveyed. Moreover, the wafer conveyed by the magnetic force can be directly held in the reaction chamber in heated state.

Apparatus for conveying and processing a wafer in a physically

The opening width of an element isolating trench is Wa'. The opening width of a substrate potential setting trench is Wb'. When the maximum film thickness of a polysilicon film lying on the side wall of each of the trenches is set to t, the opening width Wa' of the element isolating trench and the opening width Wb' of the substrate potential setting trench satisfies a condition that (Wa'-2t)&lt;(Wb'-2t) and Wa'&gt;2t. A silicon oxide film covers the entire portion of the internal surface of the element isolating trench and covers the internal surface of the substrate potential setting trench except the bottom portion thereof. Therefore, the polysilicon film in the element isolating trench is set in the electrically floating state and the polysilicon film in the substrate potential setting trench is connected to the semiconductor substrate.

Semiconductor device having a trench for isolating elements and a trench

In the Bi-CMOS process of manufacturing a semiconductor device by an effective combination of a bipolar transistor manufacturing process and a CMOS transistor manufacturing process in the case of the formation of a silicide film on a Bi-CMOS device, in which the bipolar transistor having an inner base region made of a silicon film grown by epitaxy and the MOS transistor having silicide formed on the gate electrode, source region and drain region in a self-aligned manner therewith are formed on the same semiconductor substrate, while the silicon film of the inner base region is epitaxially grown in a step, a silicon film is also epitaxially grown on the source/drain regions at the same time in the same step.

Process of manufacturing a semiconductor device

An N type diffusion layer as a collector is formed on a P type silicon substrate, and a field oxide film is formed on this diffusion layer. An MoSi.sub.2 film is formed on this field oxide film and a first opening is formed on those field oxide film and MoSi.sub.2 film to expose the diffusion layer. An N type layer is selectively epitaxially grown only on the bottom of the first opening. A base layer is formed on the N type layer, the side wall of the first opening and the MoSi.sub.2 film. The base layer on the N type layer is formed by epitaxial growth, while the base layer on the side wall of the first opening and the MoSi.sub.2 film is formed in a polycrystalline state. A first silicon oxide film is formed on this based layer. The first silicon oxide film is thinner on the polycrystalline base layer than on the epitaxially grown base layer. The first silicon oxide film is subjected to anisotropic etching to expose only the surface of the epitaxially grown base layer. An N type silicon film as an emitter is selectively grown only on this exposed base layer.

Method of fabricating a bipolar transistor operable at high speed

Semiconductor device with an insulation film having an end covered by a

Growing community of inventors

Kawasaki, Japan

Koji Kimura