Renesas Electronics America Inc.

Mitsubishi Denki Kabushiki Kaisha

Nec Corporation

Koji Kashimoto

Tetsuo Sato

Tsutomu Kawano

Ryoji Kato

Tsuyoshi Ota

Takao Hidaka

Muneo Maruyama

Kazutaka Saito

Kazuhito Tsuchida

Tomonori Tsuchiyama

A battery management method and apparatus. In one embodiment of the method, a source current is divided into Ic and Icr. Ic is transmitted to and charges a battery. A first voltage is generated that is related to Icr. The first voltage is converted into a first digital signal. A processing unit receives and processes the first digital signal in accordance with instructions stored in a memory. The transmission of Ic to the battery is interrupted in response to the processing unit processing the first digital signal. Current provided by the battery is divided into Idc and Idcr. Idc is transmitted to a device. A second voltage is generated that is related to Idcr. The second voltage is converted into a second digital signal. The processing unit receives and processes the second digital signal in accordance with instructions stored in the memory. The transmission of Idc to the battery is interrupted in response to the processing unit processing the second digital signal.

Battery management control method

In one embodiment of the cold end switch battery management control method, a battery generates an output voltage at a positive terminal thereof. A first control voltage is also generated by an integrated circuit. A gate of a field effect transistor (FET) receives the first control voltage, wherein the FET comprises a drain and a source with the source coupled to a negative terminal of the battery. The FET transmits current towards the battery in response to the gate receiving the first control voltage, wherein the first control voltage is greater than the output voltage, and wherein the first control voltage is less than a breakdown voltage of the integrated circuit.

Cold end switch battery management control method

In a switch driver, a pnp transistor turns ON or OFF the passage of the charging current. Resistors are commonly connected to a base of the pnp transistor. Npn transistors are provided in such a way that their collectors are connected to each of the resistors and their emitters are grounded. Bases of each of npn transistors are connected to a control unit. This control unit subsequently turns ON each of the npn transistors so that a base current required for turning ON the pnp transistor flows. Since the base current rises slowly, an abrupt rise of the switching current in a switch driver can be prevented.

Switch driver

A color LCD device is capable of preventing the leakage of an internal light irradiated from a back light without the problems relating to the fabrication cost and the cell-gap control. This device has a black matrix located and a light-shielding layer formed on a back surface of a color-filter substrate. The black matrix is located in a display area of the substrate. The light-shielding layer is located in a light-shielding area of the substrate. The black matrix is formed by a first part of a black layer located in the display area. The light-shielding layer is formed by a second part of the same layer located in the light-shielding area. At least one of red, green, and blue color-filter layers is formed as a continuous layer on substantially all of the light-shielding layer.

Color liquid-crystal display device

A logic circuit (3) comprises IIL aggregates (4a, 4b, 4c) each consisting of a plurality of IIL elements. Each of the IIL aggregates (4a, 4b, 4c) is supplied with an injector current (I.sub.inj) from an injector current source (2) through a wiring (5). A monitoring element (6) is formed by utilizing an IIL element which needs the longest time until the injector current therein attains a predetermined value. When the injector current applied to an injector current input end (9) attains the predetermined value, potentials of an output terminal (10) and a reset signal input terminal (7) fall. Therefore, a reset operation is performed in accordance with the IIL element which needs the longest time until the injector current attains the predetermined value.

Reset signal output circuit and semiconductor integrated circuit device

A transmission liquid crystal display comprises a liquid crystal panel including at least two substrates spaced apart from one another through spacers to confine a liquid crystal between the two substrates; a surface light source provided at a first side of the liquid crystal panel; and an optical diffusion lens having a plate-like shape provided at a second side of the liquid crystal panel, the lens having first and second surfaces, the first surface facing to a display screen and the second surface facing to a liquid crystal panel, entire parts of the first surface is flat, and the second surface comprises alternating flat portions and convex or concave portions having a predetermined curvature, the convex or concave portions having a difference in level of a top portion thereof from the flat portions, the convex or concave portions being arranged at a predetermined pitch, wherein a ratio of the difference in level to the pitch is in the range from 2.9:10 to 0.8:10.

Transmission liquid crystal display with a reduced dependency of a

A test circuit for testing a current-voltage conversion amplifier having photodiode (PD) without actually exposing light to PD, including a current mirror circuit having a first NPN transistor and a second NPN transistor, an input terminal for applying a test voltage, a resistor connected between the input terminal and a collector of the first NPN transistor, and a current terminal connected to a collector of the second NPN transistor. The test circuit passes a current from the current-voltage conversion amplifier to the current terminal according to the test voltage which is applied to the input terminal.

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Tokyo, Japan

Koji Kashimoto