Sanyo Electric Co., Ltd.

Koji Hirosawa

Ryoichi Yokoyama

Yasushi Miyajima

Michiru Senda

Shoichiro Matsumoto

Naoaki Komiya

Masahiro Okuyama

Yasuhiro Takeda

Koji Yamano

Kuni Yamamura

The level of a storage capacitor line is changed between two types, an H level and an L level. As a result of this change, the voltage applied to a liquid crystal is shifted so that a sufficient voltage is applied to the liquid crystal to perform a display operation. Then, at least one of two voltage levels of the storage capacitor line is used in common with the potential of at least one of plurality of voltage levels which are used in vertical driver which drives the said selection line. Furthermore, the values of the storage capacitance and parasitic capacitance for the storage capacitor line are set within a specific range.

Display device

The level of a storage capacitor line changes between two types, an H level and an L level. As a result of this change, the voltage applied to a liquid crystal is shifted so that a sufficient voltage is applied to the liquid crystal to perform a display operation. Then, by changing the voltage value of the difference between a first level and a second level, the contrast and screen brightness are adjusted. Furthermore, the capacitances generated at the locations where the two storage capacitor lines and the data line intersect are set to be substantially the same.

This invention provides a liquid crystal display device where an excellent display can be obtained by using a supplemental capacitance coupling driving method. When at least either one of voltages of a pixel electrode for a common electrode before or after a potential of a supplemental capacitance line is changed lies within a transition region R as a region of voltages which largely change a liquid crystal capacitance C, correction of an image signal is performed by adding a changing amount of the potential of the pixel electrode by using Cadded with Cafter changed. This is because that Cas one of components of Cin an amount (C/C)&#xd7;&#x394;V of the potential change of the pixel electrode caused by the potential change of the supplemental capacitance line changes.

Liquid crystal display device and controlling method thereof

The present invention provides a display capable of making flicker difficult to be observed and of reducing power consumption. The display comprises first and second pixel portions including subsidiary capacitances having a first electrode which is connected to a pixel electrode and a second electrode; first and second subsidiary capacitance lines which are connected to the second electrodes of the subsidiary capacitances of the first and second pixel portions, respectively; and a signal providing circuit including a plurality of signal providing circuit portions which provide first and second signals to the first and second subsidiary capacitance lines, respectively.

Liquid crystal display capable of making flicker difficult to be observed and reducing power consumption

The active matrix display device has a thin film transistor and a pixel electrode, which is provided with a pixel voltage through the thin film transistor, for each of pixels. A supplemental pixel electrode, which is connected to the pixel electrode of one of the pixels adjacent to each other, and which extends to the region between the two pixels adjacent to each other, is also disposed. The supplemental pixel electrode enables the region between the pixels to be used as a part of the display region. The liquid crystal of this region is also driven by the voltage same as the pixel electrode. The configuration of the peripheral circuit of the pixel portion is simplified, reducing the framing area of the panel.

Active matrix display device with floating electrode between adjacent pixels

Disclosed is an IC chip using a glass substrate capable of being manufactured at a lower cost than the IC chip using from a semiconductor wafer. Further, where the body substrate of a display device is made of glass, the IC chip and the body substrate can have equal coefficients of thermal expansion, thus preventing the IC chips from peeling off and reducing the failure rate. Furthermore, the gate line driving IC applied to a display device can be arranged as an IC chip having a length approximately equal to the display area, therefore, mounting a plurality of IC chips as the gate driving IC is not required, thereby reducing the production cost. Still further, all gate lines can be extended in parallel from the IC chip so that no difference in the delay occurs among the gate lines and the size of frame of display device can reduced.

IC substrate of glass and display device

A semiconductor device includes a glass substrate, a heat sink formed on the glass substrate and a transistor formed on the heat sink. The transistor includes an active layer formed on the heat sink and having a source region, a channel region and a drain region. A gate electrode is placed on the channel region. In addition, the heat sink may operate as additional gate electrode.

Semiconductor device with heat sink

Active matrix display device with electrode between adjacent pixels

A low power-consumption active matrix display device including gate lines, drain lines, and pixel electrodes, which are arranged at intersections between the gate lines and the drain lines. A drain line driver is connected to the drain lines to select a drain line and provide the selected drain line with an image signal. A gate line driver is connected to the gate lines to select a predetermined gate line and provide the selected gate line with a gate signal. Level shifters are connected to the drain line driver to operate in a time-dividing manner. Each level shifter supplies the drain line driver with a boosted voltage.

Active matrix display device

Between a positive power supply and a negative power supply , a p-channel transistor and an n-channel transistor are connected in series while a p-channel transistor and an n-channel transistor are also connected in series. An inverted input signal *Sig is input to the respective gates of the transistors and , while an input signal Sig is input to the respective gates of the transistors and . As a result, of a pair of the transistors connected in series, namely either the transistors and or the transistors and , when one transistor turns ON, the other transistor turns OFF. Thus, generation of through currents is prevented.

Growing community of inventors

Ichinomiya, Japan

Koji Hirosawa