Sanyo Electric Co., Ltd.

Koji Hayashi

Akira Tsukihashi

Yasushi Hanamoto

Tohru Tanaka

Toru Akiyama

Tomonori Kamiya

Tomofumi Watanabe

Toshiyuki Shutoku

Yuichiro Tsukamizu

Hideto Uchida

A controller for controlling interruptions and restarts when writing data to a recording medium by emitting a laser beam against the recording medium. The controller prevents buffer underrun errors. The laser beam is emitted at a high power level when writing data on the recording medium and at a low power read level when reading data from the medium. The writing of data is interrupted when there is a possibility of a buffer underrun error. When restarting data writing from where the interruption occurred, the laser beam is shifted from the read level to the write level before reaching the location at which the interruption occurred. This guarantees that the laser beam has the required power level when writing is restarted.

Controller for data recorder

A data recording device for recording data on an optical disc by irradiating a laser pulse on the optical disc while controlling rotation of the optical disc at a constant angular velocity. The device includes a laser condition varying unit that changes a peak value of the laser pulse in accordance with a value relating to a linear velocity of the optical disc at a position at which the laser pulse is irradiated.

Method and apparatus for recording data on an optical disc

A delay circuit comprising a delay line to delay an input signal that has a plurality of delay cells connected in series; a PLL circuit that supplies the delay line with a delay control voltage to control the delay; and a first selector that selects one of output signals of the delay cells. Each of the delay cells comprises two stages of delay inverters connected in series and an output inverter connected to a connection point of the delay inverter of the first stage and the delay inverter of the second stage. Input into the delay inverter of the first stage is an output signal of the delay inverter of the second stage in the preceding delay cell, and the first selector outputs as a delayed signal an output signal of the output inverter or the delay inverter of the second stage in one of the delay cells.

Delay circuit

A data recorder for recording data that prevents buffer overrun errors emits a laser beam against a recording medium to record data. The data has a level that determines the power of the laser beam. When there is a possibility of a buffer overrun, data recording is interrupted. The interruption is carried out when the power of the laser beam is a low level. Data recording is restarted with the laser beam generated at the low level.

Data recorder

A controller for a data recorder for recording data that records data in a continuous manner regardless of interruptions. An encoder encodes data that is to be written to a recording medium. A synchronizing circuit synchronizes the data read from the recording medium with the encoded data when the writing of data to the recording medium is interrupted. A first retry determination circuit determines whether an address of the data read from the recording medium and an address of the data provided to the encoder match. A second retry determination circuit determines whether the timing for reading data from recording medium and the timing for encoding data match. A restart circuit restarts the writing of data to the recording medium based on the determinations of the first and second retry determination circuits.

A data recorder for recording data that records data in a continuous manner regardless of interruptions. An encoder encodes data that is to be written to a recording medium. A synchronizing circuit synchronizes the data read from the recording medium with the encoded data when the writing of data to the recording medium is interrupted. A first retry determination circuit determines whether an address of the data read from the recording medium and an address of the data provided to the encoder match. A second retry determination circuit determines whether the timing for reading data from recording medium and the timing for encoding data match. A restart circuit restarts the writing of data to the recording medium based on the determinations of the first and second retry determination circuits.

A controller for a data recorder controls data recording to prevent buffer overrun errors. The data recorder emits a laser beam against a recording medium to record data. The data has a level that determines the power of the laser beam. When there is a possibility of a buffer overrun, the controller interrupts data recording. The controller interrupts data recording when the power of the laser beam is a low level and restarts data recording with the laser beam generated at the low level.

A data recorder for writing data to a recording medium that prevents buffer underrun errors. An optical head generates a laser beam at a high power level when writing data on the recording medium and at a low power level when reading data from the medium. The writing of data is interrupted when there is a possibility of a buffer underrun error. When restarting data writing from where the interruption occurred, the laser beam is shifted from the low power level to the high power level before reaching the location at which the interruption occurred. This guarantees that the laser beam has the required power level when writing is restarted.

A data recording equipment that accurately restarts the writing of data to an optical disc after data recording is interrupted. The equipment interrupts recording when detecting an external shock or when predicting the occurrence of a buffer underrun error. The equipment includes a counter, which counts execution of recording data on the optical disc and generates a count value indicating the amount of data that is recorded, and a control unit, which is connected to the counter to hold the count value of the counter immediately before an interruption when the recording of data is interrupted. The unit re-irradiates a position on the optical disc, on which data prior to the data recorded immediately before the interruption is recorded. The init controls restart of the recording based on the held count value while recognizing the position of the data on the optical disc.

Method and apparatus for recording data on an optical disc with restarting writing of data after data recording interruption

A controller of a data recorder that records data on a recording medium such that the occurrence of buffer underrun errors are prevented. Data encoded by an encoder is recorded on the recording medium. A decoder decodes the data recorded on the recording medium. The data recorder interrupts the recording of data when a buffer underrun is likely to occur. The controller restarts the recording of data when the decoded data and the encoded data are synchronized. When the decoded data is delayed from the encoded data, the controller stops the encoding until the decoded data catches up with the encoded data.

Controller of data recorder

A data recorder that prevents buffer underrun errors includes a buffer memory for temporarily storing data to be written to a recording medium and an address memory connected to a buffer memory. The address memory stores an address of the recording medium or an address of the buffer memory when data writing is interrupted. A synchronizing circuit sequentially reads data from the medium and data stored in the buffer memory prior to the interruption and synchronizes the read and stored data. A restart circuit restarts data writing when an address of data read from the medium or an address of data read from the buffer memory matches the address stored in the address memory.

A pulse delay circuit includes a delay circuit, a plurality of selectors and a plurality of synchronous circuits. The delay circuit includes a plurality of series connected delay elements for delaying a clock signal and generating a plurality of delay clock signals. Each of the selectors is connected to the plurality of delay elements and selects one of the plurality of the delay clock signals in accordance with an associated selection signal. The plurality of synchronous circuits receive pulse signals and the selected delay clock signals and generating a plurality of synchronous pulse signals that are synchronized with the selected delay clock signals, respectively.

Pulse signal delay circuit

A pulse width control circuit is used to control the pulse with of a modulation signal to be written to a recording medium, such as a CD-R. The circuit controls both the leading and trailing edges of the modulation signal. The circuit includes a first delay circuit including multiple series connected first inverters for delaying the modulation signal and generating multiple first delay signals. The first delay signals are input to a first selector, which selects one of the first delay signals. A first logic circuit receives the selected first delay signal and the modulation signal and performs a first logic operation. The output of the first logic circuit is input to a second delay circuit, which includes multiple series connected second inverters for delaying the first logic circuit output signal, and generating multiple second delay signals. A second selector selects one of the plurality of delayed logic signals in accordance with the second selection signal. A second logic circuit receives the selected second delay signal and the first logic circuit output signal and performs a second logical operation, thereby generating a pulse width controlled modulation signal. The first delay circuit and first selector control the leading edge of the modulation signal, and the second delay circuit and the second selector control the trailing edge of the modulation signal.

Pulse width control circuit

A controller interrupts and restarts writing data from a buffer memory to a medium and prevents buffer underrun errors. The controller includes an address memory for storing a recording medium address or a buffer memory address, which indicate the location of the data when the interruption occurred. A synchronizing circuit sequentially reads data from the recording medium and data from the buffer memory prior to the interruption while synchronizing the written data and the stored data. A restart circuit restarts writing data when the recording medium address or the buffer memory address matches the address stored in the address memory.

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Hashima, Japan

Koji Hayashi