Renesas Electronics Corporation

Nec Corporation

Mitsubishi Electric Corporation

Koichiro Noguchi

Koichi Nose

Yoichi Yoshida

Yoshifumi Ikenaga

Yoshio Kameda

Yoshihiro Nakagawa

Masayuki Mizuno

Masamoto Tago

Kazuhiro Kawahara

Shuhei Yokoyama

Shigeru Mori

Ryo Goto

Toru Iwagami

Motoki Imanishi

Maki Hasegawa

Shogo Shibata

Shiori Uota

Haruhiko Murakami

Toshinobu Ono

The present invention is a semiconductor module including: first and second drive circuits that perform drive control of at least one pair of first and second switching devices, in which the at least one pair of first and second switching devices and the first and second drive circuits are sealed in a package having a rectangular shape in plan view, and there are provided: a control terminal provided to protrude from a side surface of a first long side out of first and second long sides of the package, and to which a control signal of the first and second drive circuits is inputted; an output terminal provided to protrude from a side surface of the second long side; a first main terminal provided to protrude from a side surface of a first short side out of first and second short sides of the package; and a second main terminal provided to protrude from a side surface of the second short side.

Package and terminal arrangement for semiconductor module

A semiconductor module includes: a control circuit for controlling first and second transistors operating complementarily; and an internal controller receiving a data signal including a set value of an operating characteristic from an external controller to store the data signal in a memory and then transferring the set value of the operating characteristic to the control circuit. The data signal is sent to the internal controller in the order of the set value of the operating characteristic and a specific trigger value. The internal controller transfers the set value of the operating characteristic to the control circuit in timed relation to writing of the specific trigger value into the memory. The control circuit includes first and second drivers. The control circuit changes settings of the first and second drivers to thereby change the operating characteristic of the semiconductor module.

Semiconductor module and semiconductor package

A driving device for a semiconductor element includes: a plurality of detection circuits that detect different types of abnormalities of the semiconductor element; a logic circuit that generates an error signal when at least one of the detection circuits detects an abnormality; an alarm signal generating circuit that receives the error signal and generates an alarm signal made of one or a plurality of pulses, the alarm signal having a different pulse width for each of the detection circuits that has detected an abnormality; and a protection operation determining circuit that determines whether or not a protection function of the semiconductor element is operating based on the error signal and the alarm signal, and shuts off input of a drive signal to the semiconductor element when it is determined that the protection function is operating.

Driving device for semiconductor element

An external detection terminal CINis externally connectable outside a package and accepts a voltage signal proportionate to magnitude of a current in a second fixed-potential terminal. A first comparator circuit determines whether magnitude of the current in the second fixed-potential terminal indicated by the voltage signal from the external detection terminal is within a permissible range or beyond the permissible range. A second comparator circuit determines whether magnitude of a current in a sense terminal detected by using an internal detection terminal is within a permissible range or beyond the permissible range. A driving signal generator is prohibited from generating an ON signal as a driving signal if at least one of the first comparator circuit and the second comparator circuit determines that the current magnitude is beyond the permissible range.

Power semiconductor device

A communication signal terminal receives a first communication signal which includes an address of a first IC and a first configuration value for the first IC, and a second communication signal which includes an address of a second IC and a second configuration value for the second IC. A data common bus is connected to the communication signal terminal and transmits the first communication signal and the second communication signal. The first IC is configured to receive the first communication signal transmitted through the data common bus, and store first configuration value for the first IC included in the second communication signal. The second IC is configured to receive the second communication signal transmitted through the data common bus, and store the second configuration value for the second IC stored in the second communication signal.

Power module

According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source, as a second power supply voltage VDD to a first circuit, and a second switch SWwhich switches whether or not to connect to the first circuita smoothing capacitor Cwhich suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SWis switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.

Semiconductor device

A power supply device includes a plurality of power sources each including an antenna and an AC/DC conversion unit that converts an AC signal received by the antenna to a DC signal, a plurality of consolidating units each including a first consolidating circuit that selectively consolidates a plurality of DC signals supplied by the plurality of power sources, and a power supply unit that includes a second consolidating circuit that selectively consolidates DC signals output from the plurality of consolidating units, and a first voltage conversion circuit that converts a DC signal resulting from consolidation in the second consolidating circuit, to a predetermined voltage.

Power supply device, and control method of power supply device

A semiconductor device is provided which can quickly detect a malfunction of high priority modules by frequently checking a coupling state between the high priority modules and a communication bus. According to an embodiment, a host controller includes a module control circuit that performs data communication with a plurality of externally-provided modules through a communication bus, a coupling state check circuit which is coupled to the communication bus and which checks the presence or absence of a response from the modules, and selected from the modules based on information of a check list, and a control circuit that selectively causes the module control circuit and the coupling state check circuit to operate.

Semiconductor device, semiconductor system including the same, control method of semiconductor device, and check list generation program

There is a problem in the prior semiconductor devices that energy recovery efficiency is low. According to one embodiment of the present invention, a power supply circuit includes an alternating-current signal synthesis unit including a plurality of alternating-current coupling elements having primary sides to which respective input alternating-current signals are input and secondary sides connected in series with each other, and a control circuit that outputs an input selection signal specifying a combination of the input alternating-current signals to be synthesized. The control circuit generates the input selection signal so as to maximize the output alternating-current signal synthesized by the alternating-current synthesis signal unit.

Power supply circuit

A power supply device according to an embodiment comprises a plurality of power sourceseach including an antenna and an AC/DC conversion unit, a plurality of consolidating units_to_, and a power supply unit. The consolidating units_to_respectively include consolidating circuits_to_that selectively consolidate a plurality of DC signals_to_supplied by the plurality of power sources. The power supply unitincludes a consolidating circuitthat selectively consolidates the DC signals_to_output from the plurality of consolidating units_to_, and a voltage conversion circuitthat converts a DC signalresulting from consolidation in the consolidating circuit, to a predetermined voltage.

A control voltage generating circuit according to an aspect of the present invention includes: a reference voltage unit that includes a plurality of first transistors of the same conductivity type connected in series between a first power supply and a second power supply, and generates a drain voltage of one of the plurality of first transistor as a reference voltage; and a voltage conversion unit that includes a plurality of second transistors connected in series between the first power supply and the second power supply and having the same conductivity type as that of the reference voltage, supplies the reference voltage to a gate of one of the plurality of second transistors, and outputs a drain voltage of one of the plurality of second transistors as a control voltage.

Control voltage generating circuit, constant current source circuit, and delay circuit and logic circuit including the same

A semiconductor inspection apparatus comprising: a plurality of wafer stages, provided independently for each of a plurality of laminated semiconductor wafers, that directly or indirectly secure the corresponding semiconductor wafers and that possess a mechanism for positioning the corresponding semiconductor wafers; and a probe card, arranged outside or in between the plurality of laminated semiconductor wafers so as to face the semiconductor wafers, that transmits a signal or power to the plurality of semiconductor wafers.

Semiconductor inspection apparatus, semiconductor wafer positioning method, and semiconductor wafer inspection method

A semiconductor inspecting device comprises a probe card for transmitting a signal or power supply to semiconductor wafers having one or more subject chips formed therein, and is constituted such that the first semiconductor wafer faces the first face of the probe card and such that the second semiconductor wafer faces the second face of the probe card on the opposite side of the first face. The probe card includes one or more inspecting chips, which can perform non-contact transmissions with the first subject chip in the first semiconductor wafer and the second subject chip in the second semiconductor wafer.

Semiconductor inspecting device and semiconductor inspecting method

A semiconductor device () includes a semiconductor wafer () on which a plurality of semiconductor chip forming regions (A) is formed, a circuit section () which is provided within each of the semiconductor chip forming regions (A) of the semiconductor wafer (), a control circuit section (), provided within each of the semiconductor chip forming regions (A) and connected to the circuit section (), that controls electric power supplied to the circuit section (), a power supply line () connected to the plurality of control circuit section (), and a reference power line () connected to the plurality of control circuit section (). In each of the control circuit sections (), a voltage of electric power supplied from the power supply line () is controlled on the basis of a reference voltage from the reference power line ().

Growing community of inventors

Tokyo, Japan

Koichiro Noguchi