Mitsubishi Electric Corporation

Koichiro Kisu

Kentaro Yoshida

Yasuo Ata

The semiconductor device according to the present disclosure has features (1) to (3) below. The feature (1) is that 'a lower surface of an on-chip bonding material has a shape matching a surface shape of a main current wiring connection region in plan view'. The feature (2) is that “an emitter sense wiring is directly connected to a side surface of the main current wiring connection region”. The feature (3) is that “an IGBT chip has an ineffective region in which the IGBT does not function in a region below an emitter sense pad and the emitter sense wiring”.

Semiconductor device

A semiconductor device includes a semiconductor substrate, an effective region formed as a conductive section on the semiconductor substrate, an ineffective region formed as a non-conductive section on the semiconductor substrate, a wiring metal formed in the effective region, a metal section provided on an upper surface of the wiring metal and exposed to an outside, an identifying mark provided on the upper surface of the wiring metal and exposed to the outside, the identifying mark being spaced apart from the metal section, and an insulating body provided on the upper surface of the wiring metal and exposed to the outside, the insulating body being adjacent to the metal section and the identifying mark.

Growing community of inventors

Tokyo, Japan

Koichiro Kisu