Canon Kabushiki Kaisha

Koichi Ueda

Hirofumi Nakajima

Ichiro Kuwana

Akio Atsuta

Takeshi Suzuki

Ichiro Okumura

Takayuki Tsukimoto

Kazuhiro Izukawa

Tsutomu Fukatsu

Hitoshi Mukohjima

Satoshi Akiyama

Hajime Kanazawa

Yuichiro Hattori

To reduce power consumption, a data transmission apparatus comprises: a memory; a timing instruction unit which indicates a start timing of outputting data from the memory; a first interface which outputs data stored in the memory according to the timing instruction unit; a second interface which transfers the data from the first interface to a buffer; and a control unit which issues a command to perform transition of the first interface and the second interface to a power saving state based on the data output start timing indicated by the timing instruction unit, and a sum of a time required to perform transition of the first interface and the second interface to the power saving state and a time required to return from the power saving state.

Data transmission apparatus for transferring data to an output device for outputting data, printer, information processing apparatus, and control method thereof

An information processing apparatus includes a buffer, an output unit configured to output data held in the buffer to an output device, and a transfer unit configured to transfer data held in a memory to a buffer of the output unit, wherein the transfer unit transfers the data held by the memory in a first mode in which data of an amount corresponding to a size of the buffer of the output unit is transferred and then, transfers the data held by the memory in a second mode in which data of an amount smaller than the size of the buffer of the output unit is transferred a plurality of times.

Apparatus, method, and storage medium for transferring data to a buffer

A data processing apparatus includes: a receiving unit configured to receive input data including processing-target data from outside; a measuring unit configured to measure the data amount of the processing-target data included in the received input data; a data processing unit configured to perform predetermined processing on the processing-target data, and to output a result of the processing as output data; and a control unit configured to set the data processing unit to an active state based on reception of the input data by the receiving unit, and when the data amount of the output data reaches the data amount of data obtained by performing the predetermined processing on data of the data amount measured by the measuring unit, to set the data processing unit to a sleep state.

Data processing apparatus

This invention improves the access efficiency of each of a plurality of memory devices mounted on a semiconductor chip. The invention provides a memory control circuit including a queue buffer unit, a management unit to set the CKE signal at High for a memory device to which a determination target access command is to be issued when it is determined that the determination target access command has shifted to the head position of the queue buffer unit, a command generating unit to issue an access command, and a data interface unit to execute processing specified by an access command. The management unit performs control to set the CKE signal to Low for the memory device to which the determination target access command is to be issued based on the state of the queue buffer unit when it is determined that the processing by the data interface unit is complete.

Control apparatus

A data output apparatus converts input data into data that changes less than the input data, and outputs the converted data to a memory.

Data output apparatus, memory system, data output method, and data processing method

The present invention relates to an image processing apparatus, an image input/output apparatus, a scaling method and a memory control method, by which input image data is written to an external memory in tiles, the tiles written to the external memory are read, and the read-out tiles are scaled.

Image processing apparatus, image input/output apparatus, scaling method and memory control method

A data storage device includes a main memory into/from which data can be written or read out and an input/output device for receiving the data to be written into the main memory or generating the data read out from the main memory. An addressing device outputs first address data which represent an access address of the input/output device to the main memory on a basis of a unit composed of a predetermined number of data. A convertor converts the first address data into second address data representing an address in the main memory on a basis of single data and an address controller controls the access address of the input/output device to the main memory in accordance with the second address data.

Large capacity data storage device

There is disclosed a device in which detection data regarding whether the write data into a memory to store image data and the read-out data coincide or not is generated every unit data amount and the access to the memory is controlled in accordance with evaluation data obtained by evaluating the detection data in accordance with a degree of influence on an image, thereby enabling the memory to be effectively used. Information indicative of the degree of influence on the image includes the bit position of the pixel data consisting of a plurality of bits, the position of each pixel data on the screen, the density of pixels corresponding to the invalid memory cells in the memory, and the like.

Image memorizing device utilizing the significance of unavailable data

A vibration wave device having a resilient member, and electro-mechanical energy conversion means for inducing a travelling vibration wave in the resilient member, the travelling vibration wave being used as a drive source, includes means provided on at least one member of the vibration wave device at a location integer times or approximately integer times 1/2 of the wavelength of a vibration wave which may produce noise and making the dynamic rigidity of the member non-uniform.

Vibration wave motor

A vibration wave motor in which a signal for suppressing unnecessary vibration engendered during the driving of the vibration wave motor, besides the driving signal of the motor, is applied to the motor to suppress the unnecessary vibration.

Growing community of inventors

Yokohama, Japan

Koichi Ueda