Nec Corporation

Photonics Electronics Technology Research Association (petra)

Nec Electronics Corporation

Photonics Electronics Technology Research Association

Koichi Takemura

Ichiro Ogura

Akinobu Shibuya

Tomoo Murakami

Hidemitsu Mori

Akira Ouchi

Sota Shinohara

Yasuhiro Tsujita

Kazuhiko Kurata

Noriaki Ando

Takashi Manako

Tsuneo Tsukagoshi

Mitsuru Kurihara

Toshinori Uemura

Akio Ukita

A photoelectric hybrid device includes an optical connector on a flat optical surface at one end of vertical optical waveguides for inputting and outputting an optical signal. Integration of the photoelectric hybrid device into an interposer or the like is standardized. The photoelectric hybrid device includes: conductive pins connected to an electric signal pathway for a photoelectric hybrid substrate; a translucent member having a flat optical surface and a translucent part; and self-organizing optical waveguides that form an optical path between the translucent part and an optical waveguide. The flat optical surface is not lower than the tops of the electrical connection parts on the conductive pins. Collision of the optical connector and the tops of the electrical connection parts can be avoided when an optical connector on which an optical waveguide that transmits an optical signal among the optical waveguides.

Photoelectric hybrid device and method for manufacturing same

Signal conversion device

A substrate and a semiconductor chip are connected by means of flip-chip interconnection. Around connecting pads of the substrate and input/output terminals of the semiconductor chip, an underfill material is injected. The underfill material is a composite material of filler and resin. Also, a first main surface of the substrate, which is not covered with the underfill material, and the side surfaces of the semiconductor chip are encapsulated with a molding material. The molding material is a composite material of filler and resin. An integrated body of the substrate and the semiconductor chip, which are covered with the molding material, is thinned from above and below.

Semiconductor device and method for manufacturing the same

In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.

Capacitor producing method for producing thin-film capacitors eliminating defects

Conductor piecesthat are periodically arrayed, a conductor planethat has openingsperiodically arrayed so as to correspond to the conductor pieces, and a dielectricthat is arranged between the conductor piecesand the conductor plane, are included. Island electrodesand planar inductance elementsare arranged in the openingsof the conductor plane. The island electrodesand the conductor piecesare connected by conductor posts. The island electrodesand the conductor planeare connected through the planar inductance elements

Electromagnetic band gap element, and antenna and filter using the same

A substrate () and a semiconductor chip () are connected by means of flip-chip interconnection. Around connecting pads () of the substrate () and input/output terminals () of the semiconductor chip (), an underfill material () is injected. The underfill material () is a composite material of filler and resin in which the maximum particle diameter of the filler is 5 &#x3bc;m or below and whose filler content is 40 to 60 wt %. Also, a first main surface of the substrate (), which is not covered with the underfill material (), and the side surfaces of the semiconductor chip () are encapsulated with a molding material (). The molding material () is a composite material of filler and resin whose filler content is over 75 wt % and in which the glass transition temperature of the resin is over 180&#xb0; C. An integrated body of the substrate () and the semiconductor chip (), which are covered with the molding material (), is thinned from above and below.

In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.

Semiconductor memory and process for fabricating the same

The present invention provides a storage electrode of a capacitor, which includes a region in contact with a dielectric film of the capacitor, wherein at least the region is made of an amorphous electrically conductive oxide material.

Growing community of inventors

Tokyo, Japan

Koichi Takemura