Nec Corporation

Renesas Electronics Corporation

Ebara Corporation

Fujitsu Corporation

Mitsubishi Electric Corporation

Koichi Takeda

Masahiro Nomura

Kiyoshi Takeuchi

Shunichi Kaeriyama

Hitoshi Wakabayashi

Masayasu Tanaka

Hirokazu Nagase

Koichi Terashima

Shigeharu Yamagami

Takahiro Shimoi

Hozumi Yasuda

Koji Watanabe

Katsuhiko Tanaka

Noboru Kawaguchi

Hidetoshi Ikeda

Katsuhide Watanabe

Toru Tatsumi

Tomoya Hattori

Hideaki Numata

Ryuichi Kosuge

Atsushi Ogura

Risho Koh

Shinpei Watanabe

Akihiko Kanda

Atsumu Oikawa

Rumiko Inoue

Nobuyuki Takahashi

Hiroyuki Shinozaki

Tohru Kimura

Itsuki Kobata

Yu Ishii

Masafumi Inoue

Hidenori Mitani

Satoshi Tsuchiya

Kenichiro Saito

Ken Matsubara

Yoshifumi Ikenaga

Tsuneo Torikoshi

Kunio Oishi

Tomohiro Tanaka

Yoshiharu Aimoto

Takashi Iwase

Hidetaka Nakao

Hideo Toyoshima

Takamasa Nakamura

Yoji Kashihara

Genta Watanabe

Yuji Yagi

Shigeru Kuhara

Kunimasa Matsushita

Masumi Nishijima

Shuichi Kamata

Tomoya Saito

Kazuya Otsu

Yoshinobu Kaneda

Masaya Nakano

A semiconductor device capable of increasing readout margin in a nonvolatile resistive random access memory is provided. A clamping circuit applies fixed potential to each of a memory element and a reference resistive element. A pre-charge circuit pre-charges first and second nodes to power-source potential. A sense amplifier amplifies the potential difference between the potential of the first node and the potential of the second node generated after a discharge period based on cell current and reference current after pre-charging made by the pre-charge circuit. A third node is coupled to the first and second nodes through a capacitor. An electric-charge supply circuit is connected to the third node, and supplies electric charge to the third node in the discharge period.

Semiconductor device including resistive random access nonvolatile memory for increasing readout margin

A clamp elementapplies a fixed potential to a bit line BL at a time of a readout operation. A reference current source RCS generates a reference current Iref. An offset current source OCSis activated at a time of a readout operation for an OTP cell OTPC, and at a time of being activated, generates an offset current Iofto be subtracted from a cell current Icel. At the time of the readout operation for the OTP cell OTPC, the sense amplifier SA detects a magnitude relationship between the reference current Iref and a readout current Ird obtained by subtracting the offset current Ioffrom the cell current Icel.

Semiconductor device

Provided are a driven object side presser to press the first holder from a side where the driven object exists, a force transmitter to convert a tensile force to a pressing force with which the driven object side presser presses the first holder and to transmit the pressing force to the driven object side presser, a fixed member side presser to press the first holder from a side where the fixed member exists, a support fixed to the fixed member, a link to be connected to the force transmitter rotatably, the support, and the fixed member side presser and to move the fixed member side presser in a direction approaching the first holder when the force transmitter is moved in a direction away from the first holder, and a locking force generator to generate the tensile force, and to lock the first holder so as not to be moved.

Locking device, gimbal mechanism, and telescope device

Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier. The differential amplifier includes: a current source that is connected to a first power supply in which a suppliable current is a first current; an active element pair that is connected to the current source, and amplifies a signal input to an input terminal pair to output an output signal pair; a load element pair that is connected to a second power supply different in power supply voltage from the first power supply, the load element pair serving for outputting the output signal pair to an output terminal pair; and a capacitance element pair that is inserted between an external input terminal pair and the input terminal pair; a switching element pair that charges the capacitance element pair to generate a voltage, which is obtained by converting an offset voltage of the input terminal pair into an input voltage, in the capacitance element pair by short-circuiting corresponding terminals between the output terminal pair and the input terminal pair; and a current control circuit that controls a current suppliable by the current source to a second current larger than the first current at a time of performing the charge.

Differential amplifier, semiconductor device and offset cancellation method

A semiconductor device capable of changing a data programming process in a simple manner according to a situation is provided. The semiconductor device includes a plurality of memory cells, a programming circuit for supplying a programming current to the memory cell, and a power supply circuit for supplying power to the programming circuit. The power supply circuit includes a charge pump circuit for boosting the external power supply, a voltage of the external power supply according to the selection indication, and a selectable circuit capable of switching the boosted voltage boosted by the charge pump circuit. The control circuit further includes a control circuit for executing data programming processing by the programming circuit by switching the selection indication.

Semiconductor device and semiconductor system

A local polishing system comprises: a particle estimation unit () for estimating the film thickness distribution of a wafer; a local polishing region setting unit () for setting a local polishing region on the wafer based on the film thickness distribution; a polishing head selection unit () for selecting a polishing head based on the size of the local polishing region; a model storage () holding a recipe generating model that defines the relation between an input node and an output node, the input node being an attribute of the local polishing region, the output node comprising a recipe for a polishing process; a polishing recipe generator () that puts an attribute of the local polishing region set by the local polishing region setting unit () into the input node of the recipe generating model and determines a polishing recipe for polishing the local polishing region; and a polishing recipe transmitter () for transmitting data of the polishing recipe to a local polishing module () that performs local polishing.

Substrate processing control system, substrate processing control method, and program

Primary mirror fixture for space telescope

One object is to provide a polishing machine and a polishing method capable of improving a processing accuracy on the surface of an object. A method of polishing an object is provided. Such a method comprises: a first step of polishing an object by moving the object and a first polishing pad having a smaller dimension than that of the object relative to each other while the first polishing pad is made to contact the object, a second step of polishing the object, after the first step of polishing, by moving the object and a second polishing pad having a larger dimension than that of the object relative to each other while the second polishing pad is made to contact the object, and a step of detecting the state of the surface of the object before the first step of polishing.

Polishing machine and a polishing method for a substrate

A non-transitory computer-readable storage medium storing a program of stretching operation of an elastic membrane which can enhance elasticity of an elastic membrane in a short time without using a dummy wafer is disclosed. The non-transitory computer-readable storage medium storing a program of stretching operation of an elastic membrane in a substrate holding apparatus, the program causes a computer to perform stretching operation of supplying a pressurized fluid to a pressure chamber formed by the elastic membrane and allowing the pressure chamber to be open to the atmosphere a predetermined number of times by a pressure regulating device in a state where the substrate holding apparatus is positioned above a polishing table during standby operation of a polishing apparatus.

Non-transitory computer-readable storage medium storing a program of stretching operation of elastic membrane, method of stretching operation of elastic membrane, and polishing apparatus

A semiconductor device capable of enlarging a read margin of a memory cell and a method of surrounding a read of a memory are provided. The reference word line RWL is activated in a time division manner with respect to the plurality of word lines WL. The precharge circuit PRE applies the read potential VRD to the bit line BL, and the precharge circuit PRE flows the read current Icel from the selected memory cell MC and the read reference current Iref from the reference cell RC to the bit line BL in a time division manner. A detection currents Ird, Irr, each of which is a current proportional to the current flowing through the bitline BL, flows through the current detection line CDL.

Non-volatile memory read method for improving read margin

The present disclosure provides a substrate processing apparatus including: a substrate holding unit that holds a substrate; a pressure regulator that regulates a pressure of a gas supplied into an elastic membrane; and a controller that controls the pressure regulator to make the pressure of the gas supplied into the elastic membrane variable in order to separate the substrate from the elastic membrane.

Substrate processing apparatus

According to an embodiment, a word line driver includes: a first inverter that is driven by a first power supply voltage and inverts and outputs a decode signal; a second inverter that is driven by a second power supply voltage and inverts and outputs the decode signal; a first PMOS transistor that is controlled to be turned on or off on the basis of an output signal of the second inverter; a first NMOS transistor that is controlled to be turned on or off on the basis of an output signal of the first inverter; and a second PMOS transistor that is provided between a power supply voltage terminal to which the second power supply voltage is supplied and the gate of the first PMOS transistor and is temporarily turned on in synchronization with falling of the decode signal.

Driving circuit, semiconductor device including the same, and control method of the driving circuit

A level shift circuit includes a pulse signal generation unit generating first and second pulse signals with respect to an input signal, a first level conversion unit converting the first pulse signal at a first voltage to a third pulse signal at a second voltage, a second level conversion unit converting the second pulse signal at the first voltage to a fourth pulse signal at the second voltage, and a flip flop circuit making an output signal at the second voltage rise according to the third pulse signal, and making the output signal at the second voltage fall according to the fourth pulse signal. The pulse signal generation unit compares the input signal with the output signal of the flip flop circuit, and generates the first pulse signal when the input signal rises and the second pulse signal when the input signal falls, based on a non-matching comparison result.

Level shift circuit

To stably operate a negative-voltage level shifter even when a voltage value of a high level of an input signal is lowered, a negative-voltage level shifter in a semiconductor device includes a first level shifter, a second level shifter, and a first medium-voltage generating circuit. The first level shifter converts a high level of an input signal from a positive first power-supply voltage to a first medium voltage. The second level shifter converts a low level of an output signal of the first level shifter from a third power-supply voltage to a negative fourth power-supply voltage that is lower than the third power-supply voltage. The first medium-voltage generating circuit generates the first medium voltage in such a manner that the first medium voltage is higher than the first power-supply voltage and is lower than a second power-supply voltage, and includes a source-follower NMOS transistor and a clamping PMOS transistor.

According to one embodiment of the present disclosure, provided is a method of calibrating a relationship among a pressure command value, a pressure in an air-bag, and a pressure read value of the air-bag in a substrate polishing apparatus, the substrate polishing apparatus including: a polishing table; the air-bag configured to press a substrate against the polishing table, the pressure for pressing the substrate being variable; and a pressure control unit configured to control the pressure in the air-bag in accordance with the pressure command value inputted to the pressure control unit, and read the pressure in the air-bag.

Calibration method of substrate polishing apparatus, calibration apparatus of the same, and non-transitory computer readable recording medium for recording calibration program of the same

Growing community of inventors

Tokyo, Japan

Koichi Takeda