Hitachi, Ltd.

Hitachi Video and Information System, Inc.

Other

Hitachi Video and Information Systems, Inc.

Koichi Sudo

Takaaki Matono

Tatsuo Nagata

Takeshi Sakai

Ryo Hasegawa

Haruki Takata

Katsunobu Kimura

Yasutaka Tsuru

Masato Sugiyama

Toshihiko Matsuzawa

Yasuhiro Kasahara

Yasuhiro Tomita

Makoto Kitamura

Kouichi Sugimoto

Fumiyoshi Akiyama

A gamma correction circuit includes a node level setting unit set predetermined level values of video signals from outside, in a case where encoded M-bit (where M is an arbitrary integer) video signals being represented by using predetermined number of sections and the level values of the video signals corresponding to 2 &plus;1 number of nodes (where n is an arbitrary integer) associated with the sections on which the node are specified, and a gamma correction unit for executing gamma correction for the M-bit video signal in accordance with the level values of the nodes set in the node level setting unit, thereby the gamma correction circuit executes gamma correction on various types of display devices.

Gamma correction circuit

A noise reduction signal processing apparatus for reducing noises accurately, such as for use in a display apparatus for displaying a video signal, has a median filter (,) which receives the video signal, and which executes a filter processing on the inputted video signal and outputs a reference signal; a subtracter (,) which is connected with the median filter (,), and which outputs a difference signal that indicates a difference between a reference signal outputted from the median filter (,) and the video signal; a minimum value detection circuit (,) which outputs the difference signal from the subtracter (,) or a limitation value, whichever is smaller, as a minimum value signal; and an adder (,) which adds a noise reduction signal obtained on the basis of the minimum value signal output from the minimum value detection circuit (,) and the video signal.

Noise reduction signal processing circuit and display apparatus

The present invention relates to a video signal processing apparatus for converting video signals based on a desired transmission system such as NTSC, PAL, MUSE or any other system so as to conform to a display unit of a desired screen system such as XGA, VGA or the like. The apparatus has a feature that it is provided with a PLL circuit for changing a sampling frequency used by an analog-to-digital converter for converting inputted video signals into digital signals in accordance with the sort of the transmission system of the video signals, and a controller for controlling picture element interpolation of the digital signals performed by a picture image magnifying circuit for magnifying the video signals horizontally and vertically, in accordance with the sort of the transmission system of the video signals.

Image display apparatus having a circuit for magnifying and processing a

The present invention is concerned with image display apparatus capable of displaying the image of each of a television signal (TV signal) and an image signal (PC signal) from a personal computer. In addition, the present invention is to improve the performance of such apparatus, particularly to prevent the image from being deteriorated when the pixel number is converted, or changed to increase the pixel number of each of the TV signal and PC signal. In order to achieve this, the apparatus according to the invention has its pixel number conversion circuit provided with a plurality of conversion modes of different systems so that the pixel number conversion can be performed by properly switching the conversion modes in accordance with the type of the input image signal.

Image display apparatus

Video signal processing apparatus with means for magnifying and

The present invention aims at providing an image display apparatus capable of displaying both a television signal and an image signal supplied from a personal computer with a high picture quality on a high definition display unit having 1024 by 768 pixels. In order to achieve this object, an image display apparatus according to the present invention includes an NTSC-VGA conversion circuit for converting a television signal to a signal having 640 by 480 pixels and corresponding to the non-interlacing VGA standard, a switch unit for selecting and outputting either the signal outputted from the NTSC-VGA conversion circuit and an inputted image signal from a personal computer, and a VGA-XGA conversion circuit for converting a number of pixels of a signal outputted from the switch unit to a number of pixels 1024 by 768 substantially equivalent to the number of the display unit.

Image display apparatus capable of displaying personal computer signals

Growing community of inventors

Fujisawa, Japan

Koichi Sudo