Shindengen Electric Manufacturing Company Limited

Honda Motor Co., Ltd.

Koichi Ohta

Masahiro Yoshida

Jun Hariu

Daisuke Tokumura

Kunihiro Notsu

Fuyuki Hosakawa

Hanako Kataoka

A brake apparatus for a two-wheeled vehicle includes a hydraulic brake, which receives a hydraulic force to thereby generate a braking force, and a braking force control unit, which controls the braking force by increasing or decreasing the hydraulic pressure. The two-wheeled vehicle includes an engine disposed between a front wheel and a rear wheel. The engine includes a crankcase disposed downward thereof and a cylinder extending upwardly from a front portion of the crankcase. The braking force control unit is disposed in a space surrounded by the cylinder at a position forward thereof and the crankcase at a position downward thereof, respectively. The brake apparatus for a two-wheeled vehicle is capable of promoting enhanced maneuverability, achieving sufficient durability performance, and improving electric connection performance.

Brake apparatus for two-wheeled vehicle

A thyristor type surge protector having a breakdown voltage V.sub.BO approximately equal to a surge clamping voltage V.sub.CL includes a P-type first semiconductor layer, an N-type second semiconductor layer provided in one surface of the first semiconductor layer, a P-type third semiconductor layer provided in the second semiconductor layer so as to provide at least one first exposed region of the second semiconductor layer, and an N-type fourth semiconductor layer formed in the other surface of the first semiconductor layer so as to provide at least one exposed region of said first semiconductor layer, a first electrode provided over the third semiconductor layer and of the first exposed region, and a second electrode provided over the fourth semiconductor layer and second exposed region.

Four layer semiconductor surge protector having plural short-circuited

A thyristor type surge suppressor includes a P-type semiconductor substrate, an N-type first semiconductor layer provided in one surface of the semiconductor substrate, an N-type second semiconductor layer provided in the other surface of the semiconductor substrate, a P-type third semiconductor layer formed in the N-type first semiconductor layer so as to provide a plurality of first exposed regions of the N-type first semiconductor layer, a P-type fourth first semiconductor layer formed in the N-type second semiconductor layer so as to provide a plurality of second exposed regions of the N-type second semiconductor layer, a first electrode provided over the P-type third semiconductor layer and the of N-type first exposed regions, and a second electrode provided over the P-type fourth semiconductor layer and the N-type second exposed regions. In such a structure, the N-type first and second exposed regions are disposed so as to be opposed to the P-type fourth semiconductor layer and the P-type third semiconductor layer, respectively.

Semiconductor surge suppressor

Growing community of inventors

Saitama, Japan

Koichi Ohta