Mitsubishi Electric Corporation

Koichi Nishi

Shinya Soneda

Kenji Suzuki

Koji Tanaka

Katsumi Nakamura

Akihiko Furukawa

Kazuya Konishi

Mitsuru Kaneda

Tetsuo Takahashi

Masanori Tsukuda

Tetsuya Nitta

Ze Chen

Ryu Kamibaba

Takahiro Nakatani

Junichi Yamashita

Taketoshi Shikano

Kakeru Otsuka

Norikazu Sakai

Hayato Okamoto

Mariko Umeyama

A semiconductor device includes an insulated gate bipolar transistor region having a base layer of a second conductivity type provided in a surface layer of the semiconductor substrate on a first main surface side, an emitter layer of a first conductivity type having an impurity concentration higher than that of a drift layer selectively provided in the surface layer of the base layer on the first main surface side, a plurality of gate electrodes facing the emitter layer, the base layer, and the drift layer via gate insulating films, a counter-doped layer, having an impurity concentration of the second conductivity type higher than that of the base layer and an impurity concentration of the first conductivity type higher than that of the drift layer, and a collector layer of the second conductivity type provided in the surface layer of the semiconductor substrate on a second main surface side.

Semiconductor device

When a positive gate voltage is applied to a first one of a first gate electrode and a second gate electrode, and current flows from a collector electrode to an emitter electrode, a semiconductor device applies a positive gate voltage to a second one of the first gate electrode and the second gate electrode. When a positive gate voltage is applied to the first one and current flows from the emitter electrode to the collector electrode, the semiconductor device applies voltage equal to or less than reference voltage to the second one.

Semiconductor device and method for controlling semiconductor device

Provided is a semiconductor device that is easily controlled. The semiconductor device includes a first switching device and a second switching device that are connected in series between a first potential and a second potential lower than the first potential, wherein each of the first and second switching devices includes a transistor region, and a diode region electrically connected in anti-parallel to the transistor region, the transistor region includes a first gate controlled by a first gate signal, and the diode region includes a diode gate controlled by a diode gate signal.

Semiconductor device and method for controlling the same

There is provided a technique capable of reducing turn-on power losses. A semiconductor device includes: a semiconductor substrate including a drift layer; and a base layer, a contact layer, and a source layer which are provided in the semiconductor substrate. A gate portion is provided in a first trench, with a first gate insulation film therebetween. The first trench is in contact with the contact layer, the source layer, the base layer, and the drift layer. The gate portion is provided with a recessed portion with a bottom farther away from the base layer than a side thereof. A first insulation portion is provided in the recessed portion of the gate portion in the first trench.

Semiconductor device and method of manufacturing semiconductor device

A first principal electrode and a first control electrode pad are formed on a first principal surface of the semiconductor chip. A second principal electrode and a second control electrode pad are formed on a second principal surface of the semiconductor chip. The second principal electrode and the second control electrode pad are respectively bonded to first and second metal patterns of an insulating substrate. Bonding sections of first and second wires overlap a bonding section of the second principal electrode or the second control electrode pad in plan view. Thickness of the first and second metal patterns is 0.2 mm or less.

All of four of built-in gate resistance trenches function as practical built-in gate resistance trenches. A first end portion of each of four of the built-in gate resistance trenches is electrically connected to a wiring side contact region of a gate wiring via a wiring contact. A second end portion of each of four of the built-in gate resistance trenches is electrically connected to a pad side contact region of a gate pad via a pad contact. In each of four of the built-in gate resistance trenches, a distance between the wiring contact and the pad contact is defined as an inter-contact distance.

Semiconductor device and method for manufacturing the same

An object of the present disclosure is to reduce masks and to reduce the variation in the profile of an impurity layer in a semiconductor device. A method of manufacturing a semiconductor device includes a step (b) of forming a base layer on a first main surface side of a drift layer in an active region by implanting p-type impurity ions of using the first mask, a step of (c) of forming an emitter layer on the first main surface side of the base layer by implanting n-type impurity ions using the first mask, a step (d) of forming trenches after the steps (b) and (c), a step (e) of embedding a gate electrode inside the trenches, and a step (g) of converting a part of the emitter layer into a first contact layer by implanting the p-type impurity ions having a high dosage using a second mask.

Method of manufacturing semiconductor device

The semiconductor substrate has a first principal surface and a second principal surface. The base contact layer is arranged between the base layer and the first principal surface, and forms a part of the first principal surface. The anode contact region is arranged between the anode layer and the first principal surface, forms a part of the first principal surface, and has a second conductivity type impurity concentration peak value higher than that of the anode layer. The anode contact region includes a first anode contact layer having a lower net concentration and a higher first conductivity type impurity concentration than the base contact layer.

Reverse conducting semiconductor device and method for manufacturing reverse conducting semiconductor device

A semiconductor device includes: a semiconductor substrate including an upper surface and a lower surface opposing each other and a drift layer of a first conductivity type; a base layer of a second conductivity type; an emitter layer of the first conductivity type and a contact layer of the second conductivity type; an active trench; dummy trenches; a trench gate electrode formed in the active trench; a dummy trench gate electrode formed in each of the dummy trenches; an embedded insulating film formed on the trench gate electrode in the active trench, formed on the dummy trench gate electrode in the dummy trench, and having an upper end lower than the upper surface; and an emitter electrode contacting the emitter layer on the upper surface and an inner wall of the active trench, and contacting the contact layer on the upper surface and an inner wall of the dummy trench.

A semiconductor device includes: a drift layer of a first conduction type provided in a semiconductor substrate having a first principal plane and a second principal plane opposed to the first principal plane; a first semiconductor layer of a second conduction type provided between the first principal plane of the semiconductor substrate and the drift layer and having impurity concentration higher than impurity concentration of the drift layer; a first buffer layer of a first conduction type provided between the second principal plane of the semiconductor substrate and the drift layer and having hydrogen-induced donors with impurity concentration higher than impurity concentration of the drift layer; and a second semiconductor layer of a first conduction type or a second conduction type provided between the second principal plane of the semiconductor substrate and the first buffer layer and having impurity concentration higher than impurity concentration of the drift layer, wherein the first buffer layer includes a complex defect of interstice carbon and interstice oxygen having density decreasing from the second principal plane side toward the first principal plane side.

Semiconductor device comprising a buffer layer including a complex defect of interstice carbon and interstice oxygen

A semiconductor device includes: a carrier stored layer; an upper-stage active portion disposed on a first insulating film along an inner wall of an upper portion of a trench penetrating the carrier stored layer, the upper-stage active portion being upper-stage polysilicon connected to a gate electrode; and lower-stage polysilicon disposed on a second insulating film along an inner wall of a lower portion of the trench, the lower-stage polysilicon provided with a third insulating film disposed between the upper-stage active portion and the lower-stage polysilicon. The lower end of the upper-stage active portion is positioned below the lower end of the carrier stored layer.

A semiconductor device includes; a semiconductor substrate; an emitter electrode provided on the semiconductor substrate; a gate electrode provided on the semiconductor substrate; a drift layer of a first conduction type provided in the semiconductor substrate; a source layer of the first conduction type provided on an upper surface side of the semiconductor substrate; a base layer of a second conduction type provided on the upper surface side of the semiconductor substrate; a collector electrode provided below the semiconductor substrate; and a two-part dummy active trench including, at an upper part, an upper dummy part not connected with the gate electrode and including, at a lower part, a lower active part connected with the gate electrode and covered by an insulating film, in a trench of the semiconductor substrate, wherein a longitudinal length of the lower active part is larger than a width of the lower active part.

Semiconductor device and semiconductor apparatus

A semiconductor device includes: a semiconductor substrate including a front surface, a back surface that is opposite to the front surface, and a drift layer of a first conductive type disposed between the front surface and the back surface; a first diffusion layer of a second conductive type provided between the drift layer and the front surface; a second diffusion layer provided between the drift layer and the back surface; a first buffer layer of the first conductive type provided between the drift layer and the second diffusion layer, having a concentration higher than that of the drift layer, and into which a proton is injected; and a second buffer layer of the first conductive type provided between the first buffer layer and the second diffusion layer and having a concentration higher than that of the drift layer, wherein a peak concentration of the second buffer layer is higher than a peak concentration of the first buffer layer, an impurity concentration of the first buffer layer gradually decreases toward the back surface, a length from a peak position of the first buffer layer to a boundary between the drift layer and the first buffer layer is represented by Xa, a length from the peak position to a boundary between the first buffer layer and the second buffer layer is represented by Xb, and Xb&#x3e;5 Xa.

Semiconductor device and manufacturing method thereof

Provided is a semiconductor device in which the reliability of the gate insulating film in a trench gate is improved. The semiconductor device includes a semiconductor substrate, a plurality of trench gates, and a gate electrode. The semiconductor substrate includes an active region and a wiring region. The trench gates extend from the first active region to the wiring region. The trench gates form parts of transistors in the active region. The gate electrode is provided in the wiring region and is electrically connected to the trench gates. The end portions of the trench gates are located in the wiring region. The gate electrode is provided so as to cover gate contact portions formed at the end portions of the trench gates. The gate electrode is electrically connected to trench gates via the gate contact portions. The plurality of trench gates extend only in one direction.

A semiconductor device includes an N-type drift layer provided between a first main surface and a second main surface of the semiconductor substrate and an N-type buffer layer provided between the N-type drift layer and the first main surface and having a higher impurity peak concentration than the N-type drift layer. The N-type buffer layer has a structure that a first buffer layer, a second buffer layer, a third buffer layer, and a fourth buffer layer are disposed in this order from a side of the first main surface. When a distance from an impurity peak position of the first buffer layer to an impurity peak position of the second buffer layer is L12 and a distance from an impurity peak position of the second buffer layer to an impurity peak position of the third buffer layer is L23, a relationship of L23/L12&#x2265;3.5 is satisfied.

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Tokyo, Japan

Koichi Nishi