Toshiba Memory Corporation

Koichi Nakayama

Toshiya Kotani

Tsuneo Inaba

Chikaaki Kodama

Shigeki Nojima

Takeshi Sonehara

Fumiharu Nakajima

Hirotaka Ichikawa

Nobutaka Nakamura

Erika Kodama

According to one embodiment, a semiconductor memory device includes a plurality of electrodes, extending in a first direction and a second direction orthogonal to the first direction are stacked one over the other, and include opposed sides extending in the second direction, a plurality of protrusion portions extending from the first side of the electrodes and spaced from one another in the second direction, and an extraction portion extending from the second side of the electrode. First and second contact plugs extend in a third direction orthogonal to the first and second directions, one of each contacting one of the extraction portions, wherein the extraction portion extending from the uppermost of the electrodes is located closer to the center of the second side in the second direction, than the location of the extraction portion extending from the lowermost of the electrodes.

Semiconductor memory device

According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion.

Method of wiring layout, semiconductor device, program for supporting design of wiring layout, and method for manufacturing semiconductor device

Growing community of inventors

Hiratsuka Kanagawa, Japan

Koichi Nakayama