Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kabushiki Kaisha Toshbia

Koichi Muraoka

Naoki Yasuda

Masao Shingu

Jun Fujiki

Shoko Kikuchi

Akira Takashima

Yasushi Nakasaki

Daisuke Matsushita

Tatsuo Shimizu

Koichi Kato

Takamitsu Ishihara

Yukie Nishikawa

Tsunehiro Ino

Shosuke Fujii

Yuichiro Mitani

Atsuhiro Kinoshita

Kiwamu Sakuma

Hirotaka Nishino

Keiko Ariyoshi

Hiroyuki Nagashima

Shinobu Fujita

Masato Koyama

Kosuke Tatsumura

Masahiro Kiyotoshi

Tetsufumi Tanamoto

Seiji Inumiya

Nobutoshi Aoki

Takashi Shimizu

Kazuhiro Eguchi

Daisuke Hagishima

Mariko Takayanagi

According to an aspect of the present invention, there is provided a nonvolatile semiconductor storage device including: a semiconductor substrate; a source region and a drain region that are formed in the semiconductor substrate so as to be separated from each other and so as to define a channel region therebetween; a tunnel insulating film that is formed on the channel region; an insulative charge storage film that is formed on the tunnel insulating film; a conductive charge storage film that is formed on the insulative charge storage film so as to be shorter than the insulative charge storage film in a channel direction; an interlayer insulating film that is formed on the conductive charge storage film; and a gate electrode that is formed on the interlayer insulating film.

Nonvolatile semiconductor storage device and method for manufacturing the same

According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.

Nonvolatile semiconductor memory element, nonvolatile semiconductor memory, and method for operating nonvolatile semiconductor memory element

According to one embodiment, a nonvolatile memory device includes a memory section. The memory section includes a first insulating layer, a second insulating layer and a pair of electrodes. The second insulating layer is formed on and in contact with the first insulating layer. The second insulating layer has at least one of a composition different from a composition of the first insulating layer and a phase state different from a phase state of the first insulating layer. The pair of electrodes is capable of passing a current through a current path along a boundary portion between the first insulating layer and the second insulating layer. An electrical resistance of the current path is changed by a voltage applied between the pair of electrodes.

Nonvolatile memory device

Nonvolatile semiconductor storage device

According to one embodiment, a nonvolatile semiconductor memory includes first to n-th (n is a natural number not less than 2) semiconductor layers in a first direction and extend in a second direction, and the semiconductor layers having a stair case pattern in a first end of the second direction, a common semiconductor layer connected to the first to n-th semiconductor layers commonly in the first end of the second direction, first to n-th layer select transistors which are provided in order from the first electrode side between the first electrode and the first to n-th memory strings, and first to n-th impurity regions which make the i-th layer select transistor (i is one of 1 to n) a normally-on state in the first end of the second direction of the i-th semiconductor layer.

Nonvolatile semiconductor memory

There is provided a non-volatile semiconductor memory having a charge accumulation layer of a configuration where a metal oxide with a dielectric constant sufficiently higher than a silicon nitride, e.g., a Ti oxide, a Zr oxide, or a Hf oxide, is used as a base material and an appropriate amount of a high-valence substance whose valence is increased two levels or more (a VI-valence) is added to produce a trap level that enables entrance and exit of electrons with respect to the base material.

Non-volatile semiconductor memory using charge-accumulation insulating film

A semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO, SiN, and SiON, the upper insulating layer is an oxide containing at least one metal M selected from the group consisting of a rare earth metal, Y, Zr, and Hf, and Si, and respective lengths L, L, and Lof the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation 'L&#x3c;Land L&#x3c;L'.

Semiconductor device, and method for manufacturing semiconductor device

Nonvolatile semiconductor storage device having conductive and insulative charge storage films

Growing community of inventors

Sagamihara, Japan

Koichi Muraoka